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AT24CSW04X Datasheet(PDF) 31 Page - Microchip Technology

Part # AT24CSW04X
Description  I짼C-Compatible (Two-Wire) Serial EEPROM with a Security Register and Software Write Protection 4?멚bit (512 x 8), 8?멚bit (1,024 x 8)
PDF  43 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

AT24CSW04X Datasheet(HTML) 31 Page - Microchip Technology

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10.3.1
Lock Command
The Lock command is an irreversible sequence that will permanently prevent all future writing to the Security register.
Once the Lock command has been executed, the Security register becomes read-only.
Note:  Once the Security register has been locked, it cannot be unlocked.
The Lock command protocol emulates a byte write operation to the Security register. However, the A7 through A4 bits
of the word address must be set to 0110b (6h). The remaining bits of the word address and the data word are “don’t
care” bits. Even though these bits are “don’t cares”, they still must be transmitted to the part. An ACK response to the
word address and data word byte indicates the Security register is not currently locked. A NACK response indicates
the AT24CSW04X/AT24CSW08X is already locked. Refer to Determining the Lock State of the Security Register for
details about determining the Lock status of the AT24CSW04X/AT24CSW08X.
The sequence completes with a Stop condition being sent to the device, which initiates a self-timed internal write
cycle. The Lock operation will conclude upon completion of that write cycle, subsequently making the Security
register permanently read-only. Read operations are always allowed to the device.
Figure 10-3. Lock Command
SCL
SDA
Device Address Byte
Word Address Byte
Data Word (Don’t Care bits)
Start
by
Host
ACK
from
Client
MSb
MSb
Stop
by
Host
MSb
1
2
3
4
5
6
7
8
9
1
0
1
1
#(2) @(1)
#
0
0
1
2
3
4
5
6
7
8
9
X
X
X
X
X
X
X
X
0
0
1
1
0
X
X
X
X
0
1
2
3
4
5
6
7
8
9
ACK
from
Client
ACK
from
Client
Notes: 
1.
For the AT24CSW04X, the @ indicates the A1 address bit (see Table 6-3). For the AT24CSW08X, the @
indicates the A9 address bit.
2.
# indicates the hardware address value which is managed by the ordering code of the device (see Table 6-3
and Table 6-4).
10.3.2
Determining the Lock State of the Security Register
The Lock state of the device can be determined by sending a subset of the Lock command to the device. Only the
device address byte and word address byte need to be transmitted to the device to determine the Lock state. An ACK
response to the word address byte indicates the Lock has not been set while a NACK response indicates the Lock
has been set. If the Lock has already been set, it cannot be undone. The abbreviated Lock sequence is completed by
the host sending a Stop condition to the device.
Figure 10-4. Determining the Security Register Lock State
SCL
SDA
Device Address Byte
Word Address Byte
Start
by
Host
ACK
from
Client
MSb
MSb
1
2
3
4
5
6
7
8
9
1
0
1
1
#(2) @(1) X
0
0
1
2
3
4
5
6
7
8
9
0
1
1
0
X
X
X
X
0/1
ACK from Client
if Unlocked
NACK from Client
if Locked
Stop
by
Host
Notes: 
1.
For the AT24CSW04X, the @ indicates the A1 Address bit which is managed by the ordering code of the (see
Table 6-3). For the AT24CSW08X, the @ indicates the A9 address bit.
2.
# indicates the hardware address value which is managed by the ordering code of the device (see Table 6-3
and Table 6-4).
AT24CSW04X/AT24CSW08X
Security Register
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
Datasheet
DS20006426B-page 31



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