PLL103-01

Low Skew Buffers

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 03/08/00 Page 4

2. BYTE 1: SDRAM(8:15) Clock Register (1=Enable, 0=Disable)

Bit

Pin#

Default

Description

Bit 7

45

1

SDRAM15 (Active/Inactive)

Bit 6

44

1

SDRAM14 (Active/Inactive)

Bit 5

41

1

SDRAM13 (Active/Inactive)

Bit 4

40

1

SDRAM12 (Active/Inactive)

Bit 3

36

1

SDRAM11 (Active/Inactive)

Bit 2

35

1

SDRAM10 (Active/Inactive)

Bit 1

32

1

SDRAM9 (Active/Inactive)

Bit 0

31

1

SDRAM8 (Active/Inactive)

3. BYTE 2: SDRAM(16:17) Clock Register (1=Enable, 0=Disable)

Bit

Pin#

Default

Description

Bit 7

28

1

SDRAM17 (Active/Inactive)

Bit 6

21

1

SDRAM16 (Active/Inactive)

Bit 5

-

1

Reserved

Bit 4

-

1

Reserved

Bit 3

-

1

Reserved

Bit 2

-

1

Reserved

Bit 1

-

1

Reserved

Bit 0

-

1

Reserved