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AT25DN256 Datasheet(PDF) 32 Page - Dialog Semiconductor |
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AT25DN256 Datasheet(HTML) 32 Page - Dialog Semiconductor |
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32 / 40 page ![]() 31 AT25DN256 DS-25DN256–039E–2/2017 Note: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles. 2. Not 100% tested (value guaranteed by design and characterization). tCHPE (1)(2) Chip Erase Time 250 350 ms tOTPP(1) OTP Security Register Program Time 400 950 µs tWRSR(2) Write Status Register Time 20 40 ms 13.7 Power-up Conditions Symbol Parameter Min Max Units tVCSL Minimum VCC to Chip Select Low Time 70 µs tPUW Power-up Device Delay Before Program or Erase Allowed 5 ms VPOR Power-on Reset Voltage 1.6 2.2 V 13.6 Program and Erase Characteristics Symbol Parameter 2.3V-3.6V Min Typ Max Units |
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