Left/Right Clock frequency can be entered into the

Desired LRCLK Freq edit box. The EV kit software will

automatically calculate the correct MSB/LSB values

and write them to the MAX9850 registers.

The Slave (Non-Integer) mode (Figure 8) of the

MAX9850 does not rely on the MSB or LSB registers for

operation. Slave (Integer) mode (Figure 9) can be

operated manually by entering a number in the LSB

edit box. When using the Automatic mode, the

MAX9850 EV kit software calculates the correct LSB

value and writes it to the appropriate IC register.

Digital Audio/Configuration

Digital audio control and miscellaneous configuration

options are accessed through the Digital Audio/

Configuration tab (Figure 10).

In addition to a serial data delay, the MAX9850 can also

accept an inverted bit clock (BCLK) or left/right clock

(LRCLK). Configure the MAX9850 by checking the

desired Invert or Delay checkboxes. Choose the desired

Data Format and Justification from the pulldowns.

The MAX9850 EV kit software is designed to control

both the on-board S/PDIF receiver chip as well as the

MAX9850. To maintain a valid digital link between the

two ICs, the MAX9850 EV kit software features a Lock

checkbox in both the Signals and Word Size group

boxes. When the Signals/Lock checkbox is checked,

the EV kit software will ensure that BCLK Invert,

LRCLK Invert, SDIN/OUT Delay, and Justification

settings for both the MAX9850 and the on-board S/PDIF

receiver match. When the Word Size/Lock checkbox is

checked, the EV kit software will ensure that the word

size settings for both the MAX9850 and the on-board

S/PDIF receiver match.

For example, if the MAX9850 BCLK Invert checkbox is

altered, the MAX9850 EV kit software automatically

changes the Receiver BCLK Invert checkbox to

and the system will continue to function properly.

Note: Unchecking either of the lock checkboxes will

allow the software to operate in a state that may not be

functional. Undesirable results may occur.

The GPIO of the MAX9850 is also configured on this tab.

Click the desired radio button to alter the Pin Direction

or the GPIO Output State. To route the MAX9850 inter-

nal interrupt signal to the GPIO pin, check the Enable

Interrupt on GPIO checkbox.

Receiver

The MAX9850 EV kit software also controls the on-

board S/PDIF receiver. Receiver control and status are

divided into two tabs.

Receiver Main Control

Receiver control is accessed through the Main Control

sub-tab, which is located under the Receiver tab

(Figure 11).

Choose the desired S/PDIF input (Optical or Electrical)

in the Digital Audio Input Selection box. Mute the

receiver output by checking the Mute Receiver Output

checkbox. Activate the receiver’s de-emphasis filter by

choosing the desired option in the Receiver De-

Emphasis Filter box. The on-board digital receiver fea-

tures programmable error handling. Choose the

desired method for handling S/PDIF errors in the Audio

Error Handling box.

Receiver Status

Receiver status is accessed through the Status sub-

tab, which is under the Receiver tab (Figure 12). This

tab serves as an invaluable diagnostic tool when evalu-

ating the MAX9850 EV kit.

Read the error status by clicking the Read Status button

in the Receiver Error Status window. The Monitor check-

boxes must be selected for the status bits to be valid.

Click the Read Status button in the Status box to read

the receiver status. To have the software automatically

read the receiver status at constant time intervals,

check the Automatic Read checkbox.

MAX9850 Evaluation System/Evaluation Kit

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9

Figure 9. Slave (Integer) Mode