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MCIMX6DP4AYM2AB Datasheet(PDF) 21 Page - NXP Semiconductors |
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MCIMX6DP4AYM2AB Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 166 page  Electrical Characteristics i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018 NXP Semiconductors 21 Table 4. Absolute Maximum Ratings Parameter Description Symbol Min Max Unit Core supply input voltage (LDO enabled) VDD_ARM_IN VDD_ARM23_IN VDD_SOC_IN -0.3 1.6 V Core supply input voltage (LDO bypass) VDD_ARM_IN VDD_ARM23_IN VDD_SOC_IN -0.3 1.4 V Core supply output voltage (LDO enabled) VDD_ARM_CAP VDD_SOC_CAP VDD_PU_CAP NVCC_PLL_OUT -0.3 1.4 V VDD_HIGH_IN supply voltage VDD_HIGH_IN -0.3 3.7 V DDR I/O supply voltage NVCC_DRAM -0.4 1.975 (See note 1) 1 The absolute maximum voltage includes an allowance for 400 mV of overshoot on the IO pins. Per JEDEC standards, the allowed signal overshoot must be derated if NVCC_DRAM exceeds 1.575V. V GPIO I/O supply voltage NVCC_CSI NVCC_EIM NVCC_ENET NVCC_GPIO NVCC_LCD NVCC_NAND NVCC_SD NVCC_JTAG -0.5 3.7 V HDMI, PCIe, and SATA PHY high (VPH) supply voltage HDMI_VPH PCIE_VPH SATA_VPH -0.3 2.85 V HDMI, PCIe, and SATA PHY low (VP) supply voltage HDMI_VP PCIE_VP SATA_VP -0.3 1.4 V LVDS, MLB, and MIPI I/O supply voltage (2.5V supply) NVCC_LVDS_2P5 NVCC_MIPI -0.3 2.85 V PCIe PHY supply voltage PCIE_VPTX -0.3 1.4 V RGMII I/O supply voltage NVCC_RGMII -0.5 2.725 V SNVS IN supply voltage (Secure Non-Volatile Storage and Real Time Clock) VDD_SNVS_IN -0.3 3.4 V USB I/O supply voltage USB_H1_DN USB_H1_DP USB_OTG_DN USB_OTG_DP USB_OTG_CHD_B -0.3 3.73 V USB VBUS supply voltage USB_H1_VBUS USB_OTG_VBUS —5.35 V Vin/Vout input/output voltage range (non-DDR pins) Vin/Vout -0.5 OVDD+0.3 (See note 2) 2 OVDD is the I/O supply voltage. V Vin/Vout input/output voltage range (DDR pins) Vin/Vout -0.5 OVDD+0.4 (See notes1&2) V ESD immunity (HBM) Vesd_HBM —2000 V ESD immunity (CDM) Vesd_CDM — 500 V Storage temperature range Tstorage -40 150 °C |
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