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ADV7322 Datasheet(PDF) 13 Page - Analog Devices |
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ADV7322 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 88 page ![]() Preliminary Technical Data ADV7322 Rev. PrA | Page 13 of 88 t9 t11 t10 t12 Y0 Y1 Y2 Y3 Y4 Y5 t9 t10 t11 t12 PS INPUT SD INPUT S7–S0 CONTROL INPUTS CLKIN_A CLKIN_B Y7–Y0 CONTROL INPUTS C7–C0 P_HSYNC, P_VSYNC, P_BLANK Y2 Cb1 Y1 Cr0 Y0 Cb0 S_HSYNC, S_VSYNC, S_BLANK Cr4 Cb4 Cr2 Cb2 Cr0 Cb0 Figure 11. PS (4:2:2) and SD (8-Bit) Simultaneous Input Mode [Input Mode 011] t9 t11 t10 t12 t11 t12 CLKIN_B Y7–Y0 CONTROL INPUTS Yxxx Crxxx Y1 Cr0 Y0 Cb0 P_HSYNC, P_VSYNC, P_BLANK PS INPUT t9 t10 t11 t12 SD INPUT S7–S0 CONTROL INPUTS CLKIN_A Y2 Cb1 Y1 Cr0 Y0 Cb0 S_HSYNC, S_VSYNC, S_BLANK Figure 12. PS (8-Bit) and SD (8-Bit) Simultaneous Input Mode [Input Mode 100] |
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