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MTC20455 Datasheet(PDF) 20 Page - STMicroelectronics |
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MTC20455 Datasheet(HTML) 20 Page - STMicroelectronics |
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20 / 23 page  MTC20455 20/23 Figure 13. Address and ALE timing diagram Table 20. Data input with respect to clock Table 21. Data output with respect to clock Table 22. WR_RDB input specification with respect to PCLK Table 23. CSB input specification with respect to PCLK Table 24. RDYB output with respect to PCLK Symbol Parameter Min Max Unit Tdh Data write hold time 3 ns Tds Data write setup time 10 ns Symbol Parameter Min Max Unit Tzd Data active delay from clock, Z to data 3 20 ns Tdz Data inactive delay from clock, data to Z 3 20 ns Symbol Parameter Min Max Unit Twrs setup WR_RDB to clock 10 ns Twrh hold WR_RDB to clock 3 ns Symbol Parameter Min Max Unit Twrs setup CSB to clock 10 ns Twrh hold CSB to clock 3 ns Symbol Parameter Min Max Unit Tzrd RDYB active delay from clock, Z to 0 3 19 ns Trdz RDYB inactive delay from clock, 0 to Z 3 19 ns Talew Tavs Tavh AD [15:0] ALE |
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