RTI-12
2.0 MEMORY MAP EXAMPLE
The RTI is capable of addressing 2048 x 16 of external
memory for message storage. The 2K memory space is
divided into two 1K pages and subdivided into 32 blocks of
32 x 16:
Page 1 (Receive): 32 blocks for receive messages
(32 x 16)
Page 2 (Transmit): 32 blocks for transmit messages
(32 x 16)
Address Decode
The RTI derives addresses (i.e., data pointers) for external
memory directly from the 11 least significant bits of the
command word. The address data pointer corresponds to
ADDR OUT (10:0) during RTI memory accesses.
T/R = ADDR OUT (10)
SUBADDRESS/MODE = ADDR OUT (9:5) WORD
COUNT/MODE CODE = ADDR OUT (4:0)
The T/R bit of the command word becomes the most
significant bit of the data pointer; the T/R bit serves to divide
the RAM into transmit and receive pages of 1K each. The
5-bit subaddress/mode field is used to select 1 of 32 possible
message storage blocks within the transmit or receive
message page. The 5-bit word count/mode code field acts
as a data pointer to select one of 32 locations within the
message storage block. Multiple word messages are stored
from top to bottom within the message storage block.
For mode commands, the address data pointer always
contains 00000 in the MC/SA field, regardless of whether
00000 or 11111 was received. Forcing the mode code field
to 00000 reserves the first message storage block on both
pages (receive and transmit) for mode code messages that
require data. The 5-bit mode code specifies which of the 32
locations within the message storage block to access.
P
COMMAND WORD
CS
P
STATUS WORD
SS
BIPHASE IN
BIPHASE OUT
XMIT
STATUS
Figure 6b. Illegal Transmit Command Decoding
ILL COMM
3.3
µs
Note:
1. Illegal command condition; status word Message Error bit set to logic one, RTI MES ERR pin set to a logic one, RTI Status Register
Message Error bit set to logic one.
DMA Activity Suppressed
1.0
µs (min)
COMSTR
P
CS
BIPHASE IN
MC/SA
COMSTR
Figure 6c. Mode Code Command Decoding
ILL COMM
664ns
Note:
1. To illegalize mode codes 2, 4, 5, 6, 7, or 18 assert ILL COMM within 664ns of COMSTR’s transition to logic zero. Asserting
the ILL COMM within 664ns inhibits the mode code function.
COMMAND WORD
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