SH7041A datasheet(520/923 Pages) RENESAS

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• Bit 2—Transmit End (TEND): Indicates that when the last bit of a serial character was

transmitted, the TDR did not contain valid data, so transmission has ended. TEND is a read-

only bit and cannot be written.

Bit 2: TEND

Description

Transmission is in progress

TEND is cleared to 0 when software reads TDRE after it has been set to 1, then

writes 0 in TDRE, or the DMAC or DTC writes data in TDR

End of transmission (initial value)

TEND is set to 1 when the chip is power-on reset or enters standby mode, TE is

cleared to 0 in the serial control register (SCR), or TDRE is 1 when the last bit of

a one-byte serial character is transmitted.

• Bit 1—Multiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data

when a multiprocessor format is selected for receiving in the asynchronous mode. The MPB is

a read-only bit and cannot be written.

Bit 1: MPB

Description

Multiprocessor bit value in receive data is 0 (initial value). If RE is cleared to 0

when a multiprocessor format is selected, the MPB retains its previous value.

Multiprocessor bit value in receive data is 1

• Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added

to transmit data when a multiprocessor format is selected for transmitting in the asynchronous

mode. The MPBT setting is ignored in the clock synchronous mode, when a multiprocessor

format is not selected, or when the SCI is not transmitting.

Bit 0: MPBT

Description

Multiprocessor bit value in transmit data is 0 (initial value)

Multiprocessor bit value in transmit data is 1

SH7041A Datasheet(PDF) 520 Page - Renesas Technology Corp