SH7041A datasheet(628/923 Pages) RENESAS

Part #	SH7041A

Description	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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628 / 923 page

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17.2

17.2.1

Compare Match Timer Start Register (CMSTR)

The compare match timer start register (CMSTR) is a 16-bit register that selects whether to

operate or halt the channel 0 and channel 1 counters (CMCNT). It is initialized to H'0000 by

power-on resets and by standby mode. Manual reset does not initialize CMSTR.

Bit:

——

———

—

Initial value:

R/W:

Bit:

—

STR1

STR0

Initial value:

R/W:

R/W

• Bits 15–2—Reserved: These bits always read as 0. The write value should always be 0.

• Bit 1—Count Start 1 (STR1): Selects whether to operate or halt compare match timer counter

Bit 1: STR1

Description

CMCNT1 count operation halted (initial value)

CMCNT1 count operation

• Bit 0—Count Start 0 (STR0): Selects whether to operate or halt compare match timer counter

Bit 0: STR0

Description

CMCNT0 count operation halted (initial value)

CMCNT0 count operation

SH7041A Datasheet(PDF) 628 Page - Renesas Technology Corp