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SH7041A Datasheet(PDF) 648 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 648 Page - Renesas Technology Corp |
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648 / 923 page ![]() 610 The settings for this register are effective only for the 144-pin version. There are no corresponding pins for this register in the 112-pin and 120-pin versions. However, read/writes are possible. Bit: 15 14 13 12 11 10 9 8 — PA23 MD — PA22 MD — PA21 MD — PA20 MD Initial value: 0 0 0 0 0 0 0 0 R/W: R R/W R R/W R R/W R R/W Bit: 76 5 4 3 2 1 0 PA19 MD1 PA19 MD0 PA18 MD1 PA18 MD0 — PA17 MD — PA16 MD Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R R/W R R/W • Bit 15—Reserved: This bit always reads as 0. The write value should always be 0. • Bit 14—PA23 Mode (PA23MD): Selects the function of the PA23/WRHH pin. Bit 14: PA23MD Description 0 General input/output (PA23) (initial value) ( WRHH in on-chip ROM invalid mode) 1 Most significant byte write output ( WRHH) (PA23 in single chip mode) • Bit 13—Reserved: This bit always reads as 0. The write value should always be 0. • Bit 12—PA22 Mode (PA22MD): Selects the function of the PA22/WRHL pin. Bit 12: PA22MD Description 0 General input/output (PA22) (initial value) ( WRHL in on-chip ROM invalid mode) 1 Write output ( WRHL) (PA22 in single chip mode) • Bit 11—Reserved: This bit always reads as 0. The write value should always be 0. • Bit 10—PA21 Mode (PA21MD): Selects the function of the PA21/CASHH pin. Bit 10: PA21MD Description 0 General input/output (PA21) (initial value) 1 Column address output ( CASHH) (PA21 in single chip mode) • Bit 9—Reserved: Always reads as 0. The write values should always be 0. |
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