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SH7041A Datasheet(PDF) 655 Page - Renesas Technology Corp

Part # SH7041A
Description  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Datasheet(HTML) 655 Page - Renesas Technology Corp

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617
• Bit 2—PA1 Mode (PA1MD): Selects the function of the PA1/TxD0 pin.
Bit 2: PA1MD
Description
0
General input/output (PA1) (initial value)
1
Transmit data output (TxD0)
• Bit 1—Reserved: This bit always reads as 0. The write value should always be 0.
• Bit 0—PA0 Mode (PA0MD): Selects the function of the PA0/RxD0 pin.
Bit 0: PA0MD
Description
0
General input/output (PA0) (initial value)
1
Receive data input (RxD0)
18.3.5
Port B I/O Register (PBIOR)
The port B I/O register (PBIOR) is a 16-bit read/write register that selects input or output for the
ten port B pins. Bits PB9IOR–PB0IOR correspond to the PB9/
IRQ7/A21/ADTRG pin to PB0/A16
pin. PBIOR is enabled when the port B pins function as input/outputs (PB9–PB0). For other
functions, it is disabled.
For port B pin functions PB9–PB0, a given pin in port B is an output pin if its corresponding
PBIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PBIOR is initialized to H'0000 by external power-on reset; however, it is not initialized for manual
resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained.
Bit:
15
14
13
12
11
10
9
8
——
——
——
PB9
IOR
PB8
IOR
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R/W
R/W
Bit:
76
5
4
3
2
1
0
PB7
IOR
PB6
IOR
PB5
IOR
PB4
IOR
PB3
IOR
PB2
IOR
PB1
IOR
PB0
IOR
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W



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