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SH7041A Datasheet(PDF) 668 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 668 Page - Renesas Technology Corp |
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668 / 923 page ![]() 630 • Bits 5 and 4—PD26 Mode 1, 0 (PD26MD1 and PD26MD0): These bits select the function of the PD26/D26/DACK0 pin. Bit 5: PD26MD1 Bit 4: PD26MD0 Description 0 0 General input/output (PD26) (initial value) (D26 with no ROM and CS0 = 32 bit width) 1 Data input/output (D26) (PD26 in single chip mode) 1 0 DMA transfer request received output (DACK0) (PD26 in single chip mode, and D26 with no ROM and CS0 = 32 bit width) 1 Reserved • Bits 3 and 2—PD25 Mode 1, 0 (PD25MD1 and PD25MD0): These bits select the function of the PD25/D25/ DREQ1 pin. Bit 3: PD25MD1 Bit 2: PD25MD0 Description 0 0 General input/output (PD25) (initial value) (D25 with no ROM and CS0 = 32 bit width) 1 Data input/output (D25) (PD25 in single chip mode) 1 0 DMA transfer request input ( DREQ1) (PD25 in single chip mode, and D25 with no ROM and CS0 = 32 bit width) 1 Reserved • Bits 1 and 0—PD24 Mode 1, 0 (PD24MD1 and PD24MD0): These bits select the function of the PD24/D24/ DREQ0 pin. Bit 1: PD24MD1 Bit 0: PD24MD0 Description 0 0 General input/output (PD24) (initial value) (D24 with no ROM and CS0 = 32 bit width) 1 Data input/output (D24) (PD24 in single chip mode) 1 0 DMA transfer request input ( DREQ0) (PD24 in single chip mode, and D24 with no ROM and CS0 = 32 bit width) 1 Reserved |
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