SH7041A datasheet(779/923 Pages) RENESAS

Part #	SH7041A

Description	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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779 / 923 page

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Section 23 RAM

23.1

Overview

The SH7040 series has 4 kbytes of on-chip RAM. The on-chip RAM is linked to the CPU and

direct memory access controller (DMAC)/data transfer controller (DTC) with a 32-bit data bus

(figure 23.1). The CPU can access data in the on-chip RAM in 8, 16, or 32 bit widths. The DMAC

can access 8 or 16 bit widths. On-chip RAM data can always be accessed in one state, making the

RAM ideal for use as a program area, stack area, or data area, which require high-speed access.

The contents of the on-chip RAM are held in both the sleep and standby modes. Memory area 0

addresses H'FFFFF000–H'FFFFFFFF are allocated to the on-chip RAM.

H'FFFFF000

H'FFFFF004

H'FFFFF001

H'FFFFF005

H'FFFFF002

H'FFFFF006

H'FFFFF003

H'FFFFF007

H'FFFFFFFC

H'FFFFFFFD

H'FFFFFFFE

H'FFFFFFFF

On-chip RAM

Internal data bus (32 bits)

Figure 23.1 Block Diagram of RAM

23.2

Operation

The on-chip RAM is accessed by accessing addresses H'FFFFF000–H'FFFFFFFF. On-chip RAM

is also used as cache memory. There are 2 kbytes of on-chip RAM space during cache use. See

section 9, Cache Memory (CAC), for details.

SH7041A Datasheet(PDF) 779 Page - Renesas Technology Corp