MWPR1124ZVHT datasheet(30/86 Pages) NXP

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Table 9. Voltage and current operating requirements (continued)

Symbol

Description

Min.

Max.

Unit

Notes

VDD – VDDA VDD-to-VDDA differential voltage

–0.1

0.1

VSS – VSSA VSS-to-VSSA differential voltage

–0.1

0.1

VIH

Input high voltage

• 2.7 V ≤ VDD ≤ 3.6 V

• 1.7 V ≤ VDD ≤ 2.7 V

0.7 × VDD

0.75 × VDD

—

VIL

Input low voltage

• 2.7 V ≤ VDD ≤ 3.6 V

• 1.7 V ≤ VDD ≤ 2.7 V

—

0.35 × VDD

0.3 × VDD

VHYS

Input hysteresis

0.06 × VDD

—

IICIO

IO pin negative DC injection current — single pin

• VIN < VSS-0.3V

-3

—

IICcont

Contiguous pin DC injection current —regional limit,

includes sum of negative injection currents of 16

contiguous pins

• Negative current injection

-25

—

VODPU

Open drain pullup voltage level

VDD

VRAM

VDD voltage required to retain RAM

1.2

—

1. All I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode connection to VDD. If VIN

greater than VIO_MIN (= VSS-0.3 V) is observed, then there is no need to provide current limiting resistors at the pads. If

this limit cannot be observed then a current limiting resistor is required. The negative DC injection current limiting

resistor is calculated as R = (VIO_MIN - VIN)/|IICIO|.

2. Open drain outputs must be pulled to VDD.

7.2.2 LVD and POR operating requirements

Table 10. VDD supply LVD and POR operating requirements

Symbol

Description

Min.

Typ.

Max.

Unit

Notes

VPOR

Falling VDD POR detect voltage

0.8

1.1

1.5

VLVDH

Falling low-voltage detect threshold — high

range (LVDV = 01)

2.48

2.56

2.64

VLVW1H

VLVW2H

VLVW3H

VLVW4H

Low-voltage warning thresholds — high range

• Level 1 falling (LVWV = 00)

• Level 2 falling (LVWV = 01)

• Level 3 falling (LVWV = 10)

• Level 4 falling (LVWV = 11)

2.62

2.72

2.82

2.92

2.70

2.80

2.90

3.00

2.78

2.88

2.98

3.08

Table continues on the next page...

MCU Electrical Characteristics

MWPR1124ZVHT/MWPR1024IZVHT Data Sheet, Rev. 0, 04/2018

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