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AS3956 Datasheet(PDF) 80 Page - ams AG

Part # AS3956
Description  NFC Forum Compliant Dynamic Tag
PDF  107 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3956 Datasheet(HTML) 80 Page - ams AG

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Page 80
ams Datasheet
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[v1-11] 2018-Nov-14
AS3956 − Detailed Description
EEPROM Read and Write
The EEPROM can be accessed from SPI / I²C interface or over RF
field issuing NFC read and write commands. The EEPROM access
is controlled by the internal EEPROM controller. Since the
mutual access to the EEPROM is not possible AS3956 needs to
arbitrate between MCU and NFC device in cases of mutual
access. How this is handled it is defined according to arbit_mod
bit. EEPROM programing time is TEWS. Please note that word
data is sent MSB first which is opposite to the RFID EEPROM
programming where LSB is sent first.
Three interrupts can be triggered during EEPROM read or write:
• When EEPROM programing is executed successfully an
I_io_eewr interrupt is triggered.
• When EEPROM programming is terminated due to higher
priority of the RF part, writing to a non-existent address
or writing is not allowed an I_eeac_err interrupt is
triggered.
• When EEPROM is busy and can’t be accessed an I_acc_err
interrupt is triggered
Please note it is recommended when reading or writing to
EEPROM via SPI/I2C, the MCU should first check whether there
is enough energy available, then switch to Power mode 3 and
execute the SPI/I2C read or write and finally switch back to the
original power mode if required. In Power mode 3 the internal
supply is derived from VP_IO and not the field. Switching to
Power mode 3 will avoid that the supply voltage source for the
internal chip supply might be changed during an EEPROM
SPI/I2C read or write.
Also note that EEPROM does not contain any kind of
anti-tearing mechanism that would allow detection of
corrupted data
The valid range for the Block Address byte depends on the
EEPROM size. For 4kbit EEPROM, the valid range for the Block
Address byte is from 000_0000b to 111_1111b (EEPROM blocks
from 00h to 7Fh).
Data Buffer
Data in buffer is organized in bytes; each byte is terminated by
a parity bit. Data bits in a byte are numbered from b1 to b8
where b1 is LSB bit, LSB is sent first.
Data sent over SPI / I²C is also organized in bytes, bits in a byte
are marked D0 to D7, where D0 is LSB bit, MSB is sent first.
During reception, the framing engine checks the parity bit and
removes it from data frame, and only data bytes are put into
buffer. During transmission, the process is reversed, only data
bytes are put into buffer, while the framing engine adds the
parity bits.



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