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STM32G474CB Datasheet(PDF) 44 Page - STMicroelectronics

Part # STM32G474CB
Description  Arm® Cortex®-M4 32-bit MCUFPU, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math acc, 184 ps 12 chan Hi-res timer
PDF  236 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G474CB Datasheet(HTML) 44 Page - STMicroelectronics

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Functional overview
STM32G474xB STM32G474xC STM32G474xE
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DS12288 Rev 4
3.32
Serial audio interfaces (SAI)
The device embeds 1 SAI. The SAI bus interface handles communications between the
microcontroller and the serial audio protocol.
SAI peripheral supports:
•
Two independent audio sub-blocks which can be transmitters or receivers with their
respective FIFO.
•
8-word integrated FIFOs for each audio sub-block.
•
Synchronous or asynchronous mode between the audio sub-blocks.
•
Master or slave configuration independent for both audio sub-blocks.
•
Clock generator for each audio block to target independent audio frequency sampling
when both audio sub-blocks are configured in master mode.
•
Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit.
•
Peripheral with large configurability and flexibility allowing to target as example the
following audio protocol: I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97 and SPDIF
out.
•
Up to 16 slots available with configurable size and with the possibility to select which
ones are active in the audio frame.
•
Number of bits by frame may be configurable.
•
Frame synchronization active level configurable (offset, bit length, level).
•
First active bit position in the slot is configurable.
•
LSB first or MSB first for data transfer.
•
Mute mode.
•
Stereo/Mono audio frame capability.
•
Communication clock strobing edge configurable (SCK).
•
Error flags with associated interrupts if enabled respectively.
–
Overrun and underrun detection.
–
Anticipated frame synchronization signal detection in slave mode.
–
Late frame synchronization signal detection in slave mode.
–
Codec not ready for the AC’97 mode in reception.
•
Interruption sources when enabled:
–
Errors.
–
FIFO requests.
•
DMA interface with 2 dedicated channels to handle access to the dedicated integrated
FIFO of each SAI audio sub-block.
Table 10. SAI implementation for the features implementation
SAI features
Support(1)
I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97
X
Mute mode
X
Stereo/Mono audio frame capability
X
16 slots
X



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