STM8AF6213 datasheet(27/112 Pages) STMICROELECTRONICS

27 / 112 page

DS9884 Rev 9

27/112

STM8AF6213/13A/23/23A/26

Pinout and pin description

108

PC6/ SPI_MOSI

[TIM1_CH1]

I/O

Port C6

PI master

out/slave in

Timer 1

channel 1

[AFR0]

PC7/ SPI_MISO

[TIM1_CH2]

I/O

Port C7

SPI master

in/ slave out

Timer 1

channel

2[AFR0]

PD1/ SWIM(4)

I/O

Port D1

SWIM data

interface

PD2/AIN3/

TLI[TIM5_CH3]

I/O

Port D2

Analog

input 3

[AFR2]

Timer 5 -

channel 3

[AFR1]

PD3/ AIN4/

TIM5_CH2/

ADC_ETR

I/O

Port D3

Analog

input 4

Timer 52 -

channel

2/ADC

external

trigger

1. I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the

total driven current must respect the absolute maximum ratings (see Section 10.2: Absolute maximum ratings).

2. When the MCU is in Halt/Active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for

waking up the device. In this mode, the output state of PA1 is not driven. It is recommended to use PA1 only in input mode if

Halt/Active-halt is used in the application.

3. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to VDD are

not implemented).

4. The PD1 pin is in input pull-up during the reset phase and after internal reset release.

Table 7. STM8AF6213A and STM8AF6223A TSSOP20 pin description (continued)

Pin name

Type

Input

Output

Main

function

(after reset)

Default

alternate

function

Alternate

function

after remap

[option bit]

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