STM32L051C6 datasheet(93/133 Pages) STMICROELECTRONICS

Part #	STM32L051C6

Description	Access line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC

PDF	133 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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93 / 133 page

DS10184 Rev 10

93/133

STM32L051x6 STM32L051x8

Electrical characteristics

tsu(NSS)

NSS setup time

Slave mode, SPI

presc = 2

4*Tpclk

th(NSS)

NSS hold time

Slave mode, SPI

presc = 2

2*Tpclk

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode

Tpclk-2

Tpclk

Tpclk+

tsu(MI)

Data input setup time

Master mode

tsu(SI)

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Slave mode

3.5

ta(SO

Data output access time

Slave mode

tdis(SO)

Data output disable time

Slave mode

tv(SO)

Data output valid time

Slave mode

1.65 V<VDD<3.6 V

-18

Slave mode

2.7 V<VDD<3.6 V

-18

tv(MO)

Master mode

th(SO)

Data output hold time

Slave mode

th(MO)

Master mode

1. Guaranteed by characterization results.

2. The maximum SPI clock frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI)

which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be

achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%.

Table 67. SPI characteristics in voltage Range 1 (1) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

STM32L051C6 Datasheet(PDF) 93 Page - STMicroelectronics

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