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STM8S001J3 Datasheet(PDF) 13 Page - STMicroelectronics |
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STM8S001J3 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 84 page ![]() DS12129 Rev 4 13/84 STM8S001J3 Functional overview 24 Write protection (WP) Write protection of Flash program memory and data EEPROM is provided to avoid unintentional overwriting of memory that could result from a user software malfunction. There are two levels of write protection. The first level is known as MASS (memory access security system). MASS is always enabled and protects the main Flash program memory, data EEPROM and option bytes. To perform in-application programming (IAP), this write protection can be removed by writing a MASS key sequence in a control register. This allows the application to modify the content of main program memory and data EEPROM, or to reprogram the device option bytes. A second level of write protection, can be enabled to further protect a specific area of memory known as UBC (user boot code). Refer to Figure 2. The size of the UBC is programmable through the UBC option byte (Table 12), in increments of 1 page (64-byte block) by programming the UBC option byte in ICP mode. This divides the program memory into two areas: • Main program memory: 8 Kbyte minus UBC • User-specific boot code (UBC): Configurable up to 8 Kbyte The UBC area remains write-protected during in-application programming. This means that the MASS keys do not unlock the UBC area. It protects the memory used to store the boot program, specific code libraries, reset and interrupt vectors, the reset routine and usually the IAP and communication routines. Figure 2. Flash memory organization MS36408V1 Low density Flash program memory (8 Kbytes) Programmable area from 64 bytes (1 page) up to 8 Kbytes (in 1 page steps) Program memory area Write access possible for IAP UBC area Remains write protected during IAP Data EEPROM (128 bytes) Option bytes |
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