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VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Datasheet

VSC7217

Multi-Gigabit Interconnect Chip

G52325-0, Rev. 3.0

If the transmitting devices’

REFCLKs are not frequency locked to the receiving devices’ REFCLKs,

IDLEs will have to be added to or dropped from all the channels at the same time. In order to implement this,

one VSC7217 is arbitrarily chosen as the “Master” and its

WSO output is driven to the WSI inputs of all the

receiving VSC7217s, including itself.

WSO is asserted prior to the VSC7217 adding/dropping IDLEs so all the

VSC7217s will operate simultaneously.

WSO uses a simple 3-bit serial protocol, synchronous to the Master

channel’s word clock, for indicating the required synchronization action to other VSC7217s. A steady LOW

level indicates no action is required. ‘101’ indicates that Master Channel A has seen a Word Sync Event. The

relative timing relationship between receiving a Word Sync Event (on all channels together) and seeing ‘101’

on the

WSI input in the other channels allows these channels to word-synchronize with Master Channel A.

‘110’ indicates that the next IDLE encountered in the receive data stream should be deleted. ‘111’ indicates that

an IDLE should be inserted after the next IDLE encountered in the receive data stream. Note that the arbitrarily

chosen Master Channel A must be an active channel.

Decoder Bypass Mode

If

ENDEC is LOW, the 8B/10B decoder is bypassed and a 10-bit received character Rn(9:0) is output from

each receive channel. The

KCHn output becomes Rn8, and ERRn becomes Rn9. Character alignment is han-

dled differently in this mode of operation. As mentioned in the “Encoder Bypass Mode” section, the

KCHAR

input becomes

ENCDET which enables Comma detection and re-synchronization when HIGH, and disables re-

synchronization when LOW. Only the ‘0011111xxx’ version of the Comma pattern is recognized when

ENDEC is LOW. The IDLEn output becomes COMDET (Comma Detect) which signals detection of the

‘0011111xxx’ Comma pattern in the current 10-bit output character when high. This mode of operation is

equivalent to a 10-bit interface commonly found in serializer/deserializers for the Fibre Channel (VSC7125)

and Gigabit Ethernet markets (VSC7135).

The logic used to align the four receive channels and/or insert and delete IDLE characters to compensate

for REFCLK variations between transmitting and receiving devices is disabled when

ENDEC is LOW. In order

for this mode of operation to function without errors, the word clock source, as selected by

RMODE(1:0), must

be frequency-locked to the REFCLK of the remote transmitting device in each channel. This is guaranteed

when

RMODE(1:0) = 11. For other choices of RMODE(1:0), the frequency locked condition must be guaran-

teed by system design. When

DUAL is HIGH and RMODE(1:0) = 10 or 11, the character containing the

‘0011111xxx’ Comma pattern is aligned to

RCLKn/RCLKNn in each channel so that COMDET will be

asserted on the falling edge of

RCLKn (rising edge of RCLKNn). This is done by adjusting the latency

through the elastic buffer; the recovered clock is never stretched or slivered. When the Comma pattern changes

the framing boundary, data characters prior to the assertion of

COMDET on the falling edge of RCLKn may

be corrupted.

Receiver State Machine

Each channel contains a Loss of Synchronization State Machine (LSSM) which is responsible for detecting

and handling loss of bit, channel, word and word clock synchronization in a controlled manner. There are three

states in the LSSM: LOSS_OF_SYNC, RESYNC, and SYNC_ACQUIRED as shown in the state diagram of

Figure 9. The RESYNC state is entered when a 10-bit word has been received which contains the 7-bit Comma

pattern (e.g., a K28.5 IDLE character). After entering the RESYNC state, the VSC7217 will stay in it until a

valid, non-Comma transmission is received, then it transitions to the SYNC_ACQUIRED state indicating a nor-

mal operating condition. The RESYNC state is re-entered if four consecutive Commas are received or if a sin-

gle Comma is received that changes the 10B character framing boundary. The LOSS_OF_SYNC state is