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MCP7940N-E/MS Datasheet(PDF) 10 Page - Microchip Technology

Part # MCP7940N-E/MS
Description  Battery-Backed I2C Real-Time Clock/Calendar with SRAM
PDF  58 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP7940N-E/MS Datasheet(HTML) 10 Page - Microchip Technology

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MCP7940N
DS20005010J-page 10
 2011-2022 Microchip Technology Inc. and its subsidiares
FIGURE 4-2:
ACKNOWLEDGE TIMING
4.1.2
DEVICE ADDRESSING
The control byte is the first byte received following the
Start condition from the host device (Figure 4-3). The
control byte begins with a 4-bit control code. For the
MCP7940N, this is set ‘1101’ for register read and
write operations. The next three bits are non-config-
urable Chip Select bits that must always be set to ‘1’.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’ a read operation is
selected, and when set to a ‘0’ a write operation is
selected.
The combination of the 4-bit control code and the three
Chip Select bits is called the client address. Upon
receiving a valid client address, the client device out-
puts an acknowledge signal on the SDA line. Depend-
ing on the state of the R/W bit, the MCP7940N will
select a read or a write operation.
FIGURE 4-3:
CONTROL BYTE FORMAT
SCL
9
8
7
6
5
4
3
2
11
2
3
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
Data from transmitter
Data from transmitter
SDA
Acknowledge
Bit
11
0
1
1
1
1
SACK
R/W
Control Code
Chip Select
Bits
Acknowledge Bit
Start Bit
Read/Write Bit
RTCC Register/SRAM Control Byte



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