Datasheet

32

Revision 3.10

2020-09-24

OPTIGA™ Trust M

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Appendix A – Infineon I2C Protocol Registry Map

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Appendix A – Infineon I2C Protocol Registry Map

OPTIGA™ Trust M supports IFX I2C v2.01 and is implemented as I2C slave, which uses different address locations

for status, control and data communication registers. These registers with description are outlined below in the

following table.

Table 20

IFX I2C Registry Map Table

Register

Address

Name

Size in Bytes

Description

Master

Access

0x80

DATA

DATA_REG_LEN This is the location where data shall be read from or

written to the I2C slave

Read /

Write

0x81

DATA_REG_LEN

2

This register holds the maximum data register (Addr

0x80) length. The allowed values are 0x0010 up to

0xFFFF. After writing the new data register length it

becomes effective with the next I2C master access.

However, in case the slave could not accept the new

length it indicates its maximum possible length

within this register. Therefore it is recommended to

read the value back after writing it to be sure the I2C

slave did accept the new value.

Note: the value of MAX_PACKET_SIZE is derived

from this value or vice versa (MAX_PACKET_SIZE=

DATA_REG_LEN-5)

Read /

Write

0x82

I2C_STATE

4

Bits 31:24 of this register provides the I2C state in

regards to the supported features (e.g. clock

stretching …) and whether the device is busy

executing a command and/or ready to return a

response etc.

Bits 15:0 defining the length of the response data

block at the physical layer.

Read only

0x83

BASE_ADDR

2

This register holds the I2C base address as specified

by Table 21. Default value is 0x30. After writing a

different address the new address become effective

with the next I2C master access. In case the bit 15 is

set in addition to the new address (bit 6:0) it

becomes the new default address at reset

(persistent storage).

Write only

0x84

MAX_SCL_FREQU

4

This register holds the maximum clock frequency in

KHz supported by the I2C slave. The value gets

adjusted to the register I2C_Mode setting.

Fast Mode (Fm): The allowed values are 50 up to

400.

Fast Mode (Fm+): The allowed values are 50 up to

1000.

Read

0x85

4

For details refer to Table 24

Read only

0x86

TRANS_TIMEOUT5

4

For details refer to Table 24

Read only

1

In case the register returns 0xFFFFFFFF the register is not supported and the default values specified in Table ‘List of protocol

variations’ shall be applied.