ADRF5474BCZ datasheet(11/14 Pages) AD

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Data Sheet

ADRF5474

THEORY OF OPERATION

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The ADRF5474 incorporates a 4-bit fixed attenuator array that

offers an attenuation range of 22 dB in 2 dB steps. An integrated

driver provides parallel mode control of the attenuator array.

The ADRF5474 has four digital control inputs, D2 (LSB) to D5

(MSB), to select the desired attenuation state in parallel mode, as

shown in Figure 23. Internally, there are two 8 dB stages, and these

stages can be controlled by the D4 and D5 pins.

POWER SUPPLY

The ADRF5474 requires a positive supply voltage applied to the

VDD pad and a negative supply voltage applied to the VSS pad.

Bypassing capacitors are recommended on the supply lines to filter

high frequency noise.

The power-up sequence is as follows:

1. Connect GND.

2. Power up the VDD and VSS voltages. Power up VSS after VDD to

avoid current transients on VDD during ramp up.

3. Power up the digital control inputs. The order of the digital

control inputs is not important. However, powering the digital

control inputs before the VDD voltage supply can inadvertently

forward bias and damage the internal ESD structures. To avoid

this damage, use a series 1 kΩ resistor to limit the current

flowing into the control pad.

4. Apply an RF input signal to ATTIN or ATTOUT.

The power-down sequence is the reverse order of the power-up

sequence.

Power-Up State

The ADRF5474 has an internal pull-up resistor (see Figure 6).

The internal pull-up resistor sets the attenuator to the maximum

attenuation state (22 dB) when the VDD and VSS voltages are

applied.

RF INPUT AND OUTPUT

Both RF ports (ATTIN and ATTOUT) are dc-coupled to 0 V. No dc

blocking is required at the RF ports when the RF line potential is

equal to 0 V.

The ADRF5474 supports bidirectional operation at a lower power

level. The power handling of the ATTIN and ATTOUT ports are

different. Therefore, the bidirectional power handling is defined by

the ATTOUT port. Refer to the RF input power specifications in

Table 1.

Table 7. Truth Table

Digital Control Input1

Attenuation State (dB)

D52

D42

Low

0 (reference)

Low

High

2.0

Low

High

Low

4.0

Low

High

6.0

Low

High

Low

8.0

Low

High

Low

High

10.0

Low

High

Low

12.0

Low

High

14.0

High

Low

16.0

High

Low

High

18.0

High

Low

20.0

High

22.0

1 Any combination of the control voltage input states shown in this table provides an attenuation equal to the sum of the bits selected.

2 D4 and D5 both correspond to the 8 dB state. D4 has slightly better state accuracy at higher frequencies.

Figure 23. Simplified Circuit Diagram

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