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NVMJS2D5N06CL Datasheet(PDF) 1 Page - ON Semiconductor |
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NVMJS2D5N06CL Datasheet(HTML) 1 Page - ON Semiconductor |
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1 / 7 page ![]() © Semiconductor Components Industries, LLC, 2018 June, 2021 − Rev. 1 1 Publication Order Number: NVMJS2D5N06CL/D MOSFET – Power, Single N-Channel 60 V, 2.4 mW, 164 A NVMJS2D5N06CL Features • Small Footprint (5x6 mm) for Compact Design • Low RDS(on) to Minimize Conduction Losses • Low QG and Capacitance to Minimize Driver Losses • LFPAK8 Package, Industry Standard • AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage VGS ±20 V Continuous Drain Current RqJC (Notes 1, 3) Steady State TC = 25°C ID 164 A TC = 100°C 116 Power Dissipation RqJC (Note 1) TC = 25°C PD 113 W TC = 100°C 56 Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State TA = 25°C ID 31 A TA = 100°C 22 Power Dissipation RqJA (Notes 1 & 2) TA = 25°C PD 3.9 W TA = 100°C 2.0 Pulsed Drain Current TA = 25°C, tp = 10 ms IDM 900 A Operating Junction and Storage Temperature TJ, Tstg −55 to + 175 °C Source Current (Body Diode) IS 94 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 9 A) EAS 565 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case − Steady State RqJC 1.3 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 38 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. MARKING DIAGRAM www.onsemi.com G (4) S (1,2,3) N−CHANNEL MOSFET D (5,8) LFPAK8 CASE 760AA See detailed ordering, marking and shipping information on page 5 of this data sheet. ORDERING INFORMATION V(BR)DSS RDS(ON) MAX ID MAX 60 V 2.4 mW @ 10 V 164 A 3.3 mW @ 4.5 V 2D5N06CL = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year W = Work Week 2D5N06 CL AWLYW G S DD D D SS 1 |
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