PIC16F616-ESLASHML datasheet(109/172 Pages) APEX

109 / 172 page

Preliminary

DS41288A-page 107

PIC16F616/16HV616

11.4.2

TIMER0 INTERRUPT

An overflow (FFh

→ 00h) in the TMR0 register will set

the T0IF bit of the INTCON register. The interrupt can

be enabled/disabled by setting/clearing T0IE bit of the

INTCON register. See Section 5.0 “Timer0 Module”

for operation of the Timer0 module.

11.4.3

PORTA INTERRUPT-ON-CHANGE

An input change on PORTA sets the RAIF bit of the

INTCON register. The interrupt can be enabled/

disabled by setting/clearing the RAIE bit of the INTCON

the IOCA register.

FIGURE 11-7:

INTERRUPT LOGIC

Note:

If a change on the I/O pin should occur

when any PORTA operation is being

executed, then the RAIF interrupt flag may

not get set.

TMR1IF

TMR1IE

C1IF

C1IE

T0IF

T0IE

INTF

INTE

RAIF

RAIE

GIE

PEIE

Wake-up (If in Sleep mode)(1)

Interrupt to CPU

ADIF

ADIE

IOC-RA0

IOCA0

IOC-RA1

IOCA1

IOC-RA2

IOCA2

IOC-RA3

IOCA3

IOC-RA4

IOCA4

IOC-RA5

IOCA5

TMR2IF

TMR2IE

CCP1IF

CCP1IE

C2IF

C2IE

Note

Some peripherals depend upon the system clock for

operation. Since the system clock is suspended during Sleep, only

those peripherals which do not depend upon the system clock will wake

the part from Sleep. See Section 11.7.1 “Wake-up from Sleep”.

PIC16F616-E/ML Datasheet(PDF) 109 Page - Cirrus Logic

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