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VSC8540RT Datasheet(PDF) 74 Page - Microchip Technology |
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VSC8540RT Datasheet(HTML) 74 Page - Microchip Technology |
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74 / 87 page  VSC8540RT DS60001603E-page 74 2022 Microchip Technology Inc. and its subsidiaries FIGURE 8-6: UNCOMPENSATED RGMII TIMING 8.4.10 COMPENSATED RGMII The following table lists the characteristics when using the device in RGMII compensated mode. TABLE 8-26: PHY INPUT (GTX_CLK DELAY WHEN REGISTER 20E2.[2:0]=011’B) Parameter Symbol Minimum Typical Maximum Unit Data to clock setup (TX_CLK delay = 011’b) tSETUP_T –1.0 ns Clock to data hold (TX_CLK delay = 011’b) tHOLD_T 2.8 ns tSKEWT TXD[3:0] TX_CTL TX_CLK (at Transmitter) TX_CLK (at Receiver) tSKEWR TXD[3:0] TXD[7:4] TXEN TXERR tSKEWT RXD[3:0] RX_CTL RX_CLK (at Transmitter) RX_CLK (at Receiver) tSKEWR RXD[3:0] RXD[7:4] RXDV RXERR tCYC 80% 20% tR, tF VTHRESH |
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