TMS320VC5441APGF datasheet(34/86 Pages) TI

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Functional Overview

December 1999 – Revised April 2002

SPRS122E

3.2.2.2

HPI Multiplexed Mode

In multiplexed mode, HPI16 operation is very similar to that of the standard 8-bit HPI, which is available with

other C54x

 DSP products. A host with a multiplexed address/data bus can access the HPI16 data register

(HPID), address register (HPIA), or control register (HPIC) via the HD bidirectional data bus. The host initiates

the access with the strobe signals (HDS1, HDS2, HCS) and controls the type of access with the HCNTL,

HR/W, and HAS signals. The DSP can interrupt the host via the x_HINT signal, and can stall host accesses

via the HRDY signal. Bit 20 of the HPIA register is used to make selection between program (shared) memory

and data (local) memory access. Table 3–3 shows the memory selection via HA[20].

Table 3–3. HPI Local/Shared Memory Selection Via HA[20]

HA[20]

Memory Type

Local (data)

Shared (program)

3.2.2.3

Host/DSP Interrupts

In multiplexed mode, the HPI16 offers the capability for the host and DSP to interrupt each other through the

HPIC register.

For host-to-DSP interrupts, the host must write a “1” to the DSPINT bit of the HPIC register. This generates

an interrupt to the DSP. This interrupt can also be used to wake the DSP from any of the IDLE 1,2, or 3 states.

Note that the DSPINT bit is always read as “0” by both the host and DSP. The DSP cannot write to this bit (see

Figure 3–12).

For DSP-to-host interrupts, the DSP must write a “1” to the HINT bit of the HPIC register to interrupt the host

via the x_HINT pin. The host acknowledges and clears this interrupt by also writing a “1” to the HINT bit of the

HPIC register. Note that writing a “0” to the HINT bit by either host or DSP has no effect.

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