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VBUS05M2-HT1 Datasheet(PDF) 2 Page - Vishay Siliconix |
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VBUS05M2-HT1 Datasheet(HTML) 2 Page - Vishay Siliconix |
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2 / 7 page ![]() VBUS05M2-HT1 www.vishay.com Vishay Semiconductors Rev. 1.4, 17-Sep-2019 2 Document Number: 85923 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE The VBUS05M2-HT1 is a two-line ESD protection device with a bidirectional and symmetrical (BiSy) breakdown and clamping performance made for application with a voltage working range up to ± 5.5 V. The high ESD immunity and a very low capacitance makes it usable for high frequency applications like USB2.0, USB3.0, or HDMI. With the VBUS05M2-HT1 two high speed data lines can be protected against transient voltage signals like ESD (electro static discharge). Connected to the data line (pin 1 and pin 2) and to ground (pin 3) negative transients will be clamped close above the 5.5 V working range. FLOW THROUGH DESIGN Modern digital transmission lines can be clocked up to 480 Mbit/s (USB2.0) or 1.65 Gbit/s (HDMI). At such high data rates the transmission lines like cables or the line traces on the PCBs have to be very homogeneous regarding their surge impedance. This requires well defined trace dimensions as trace width and distance which have to be calculated depending on the requested surge impedance (e.g. 50 ) and the PCB material and layer dimensions. Any device connected to the data lines - like ESD protection devices - have to be connected with minimal changes in these trace dimensions and distances. With the package in the so called “Flow Through Design” this is possible. The lines are running straight along the PCB while the VBUS05M2-HT1 is placed on top without any via or loops. SCHEMATIC DIAGRAM Fig. A The simplified schematic diagram in Fig. A shows three identical Z-diodes with the cathode on pin 1, 2, or 3 and common anodes. In reality each Z-diode consist of one Z-diode for the adjustment of the breakdown voltage, and two low capacitance switching diodes which provide the low capacitance. Positive transients will be clamped through the switching diode DP and the Z-diode ZD while negative transients will be clamped through the switching diode DN. ELECTRICAL CHARACTERISTICS (pin 1 or pin 2 to pin 3; in both directions) (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Protection paths Number of lines which can be protected Nchannel - - 2 lines Reverse stand-off voltage Max. reverse working voltage VRWM -- 5.5 V Reverse voltage At IR = 0.1 μA VR 5.5 - - V Reverse current At VRWM = 5.5 V IR - < 0.001 0.1 μA Reverse breakdown voltage At IR = 1 mA VBR 7.5 8.5 9.5 V Reverse clamping voltage At IPP = 1 A VC -11 13 V At IPP = IPPM = 3.6 A VC -15 18 V Clamping voltage Transmission line pulse (TLP), tp = 100 ns ITLP = 8 A VC-TLP -19- V Transmission line pulse (TLP), tp = 100 ns ITLP = 16 A VC-TLP -27- V Dynamic resistance Transmission line pulse (TLP), tp = 100 ns RDYN -1- Capacitance At VR = 0 V; f = 1 MHz CD - 0.35 0.4 pF At VR = 3.3 V; f = 1 MHz - 0.35 0.4 pF 12 3 DN DP ZD = |
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