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R5F5671CDDFB Datasheet(PDF) 19 Page - Renesas Technology Corp

Part # R5F5671CDDFB
Description  120-MHz 32-bit RX MCU, on-chip double-precision FPU, 707 CoreMark, up to 2-MB flash memory (supporting the dual bank function), 384-KB SRAM, various communications interfaces, including SD host interface, Quad SPI, and CAN, Capacitive touch sensing unit,
PDF  178 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F5671CDDFB Datasheet(HTML) 19 Page - Renesas Technology Corp

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RX671 Group
1. Overview
R01DS0373EJ0110 Rev.1.10
Page 19 of 178
Apr 15, 2022
1.4
Pin Functions
Table 1.4 lists the pin functions.
Table 1.4
Pin Functions (1/8)
Classifications
Pin Name
I/O
Description
Digital power supply
VCC
Input
Power supply pin. Connect this pin to the system power supply.
Connect the pin to VSS via a 0.1-µF multilayer ceramic
capacitor. The capacitor should be placed close to the pin.
VCL
Input
Connect this pin to VSS via a 0.22-µF multilayer ceramic
capacitor. The capacitor should be placed close to the pin.
VSS
Input
Ground pin. Connect it to the system power supply (0 V).
VBATT
Input
Backup power pin
Clock
XTAL
Output
Pins for a crystal resonator. An external clock signal can be
input through the EXTAL pin.
EXTAL
Input
BCLK
Output
Outputs the external bus clock for external devices.
SDCLK
Output
Outputs the SDRAM-dedicated clock.
XCOUT
Output
Input/output pins for the sub clock oscillator. Connect a crystal
resonator between XCOUT and XCIN.
XCIN
Input
CLKOUT
Output
Clock output pin.
EXCIN
Input
External clock input pin for the RTC, battery backup, and REMC
Clock frequency accuracy
measurement
CACREF
Input
Reference clock input pin for the clock frequency accuracy
measurement circuit
Operating mode control
MD
Input
Pin for setting the operating mode. The signal level on this pin
must not be changed during operation.
UB
Input
USB boot mode enable pin
UPSEL
Input
Selects the power supply method in USB boot mode.
The low level selects self-powered mode and the high level
selects bus-powered mode.
System control
RES#
Input
Reset signal input pin. This LSI enters the reset state when this
signal goes low.
EMLE
Input
Input pin for the on-chip emulator enable signal. When the on-
chip emulator is used, this pin should be driven high. When not
used, it should be driven low.
BSCANP
Input
Boundary scan enable pin. Boundary scan is enabled when this
pin goes high. When not used, it should be driven low.
On-chip emulator
FINED
I/O
Fine interface pin
TRST#
Input
On-chip emulator or boundary scan pins. When the EMLE pin is
driven high, these pins are dedicated for the on-chip emulator.
TMS
Input
TDI
Input
TCK
Input
TDO
Output
TRCLK
Output
This pin outputs the clock for synchronization with the trace
data.
TRSYNC
TRSYNC1
Output
These pins indicate that output from the TRDATA0 to TRDATA7
pins is valid.
TRDATA0
TRDATA1
TRDATA2
TRDATA3
TRDATA4
TRDATA5
TRDATA6
TRDATA7
Output
These pins output the trace information.



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