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SLG46117 Datasheet(PDF) 39 Page - Renesas Technology Corp

Part # SLG46117
Description  Programmable Mixed-signal Matrix with P-FET Power Switch with Discharge
PDF  91 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SLG46117 Datasheet(HTML) 39 Page - Renesas Technology Corp

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000-0046117-113
Page 38 of 89
SLG46117
10.1.2 2-Bit LUT or D Flip-Flop Macrocells Used as D Flip-Flop Register Settings
Table 23. DFF0 Register Settings
Signal Function
Register Bit
Address
Register Definition
DFF0 or Latch
select
reg <224>
0: DFF function
1: Latch function
DFF0 output select
reg <225>
0: Q output
1: nQ output
DFF0 initial polarity
select
reg <226>
0: Low
1: High
LUT2_0 data
reg <235:232>
LUT2_0 data
LUT2_0 or DFF0
select
reg <240>
0: LUT2_0
1: DFF0
Table 24. DFF1Register Settings
Signal Function
Register Bit
Address
Register Definition
DFF1 or Latch
select
reg <228>
0: DFF function
1: Latch function
DFF1 output select
reg <229>
0: Q output
1: nQ output
DFF1 initial polarity
select
reg <230>
0: Low
1: High
LUT2_1 data
reg <239:236>
LUT2_1 data
LUT2_1 or DFF1
select
reg <241>
0: LUT2_1
1: DFF1



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