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STM32L4 Datasheet(PDF) 10 Page - STMicroelectronics |
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STM32L4 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 33 page ![]() Clock Scheme New Features 9 STM32L476xx/486xx STM32L4+ PLLM divider PLLM:1 to 8 PLLM: 1 to 16 PLLN factor PLLN:8 to 86 PLLN: 8 to 127 PLLP divider PLLP: 7 or 17 PLLP: 2 to 31 PLLSAI1M divider NA PLLSAI1M: 1 to 16 PLLSAI1N factor PLLSAI1N: 8 to 86 PLLSAI1N: 8 to 127 PLLSAI1P divider PLLSAI1P: 7 or 17 PLLPSAI1P: 2 to 31 PLLSAI2M divider NA PLLSAI2M: 1 to 16 PLLSAI2N factor PLLSAI2N: 8 to 86 PLLSAI2N: 8 to 127 PLLSAI2P divider PLLSAI2P: 7 or 17 PLLSAI2P: 2 to 31 PLLSAI2Q divider NA PLLSAI2Q: 2, 4, 6 or 8 HSI16 HSITRIM[4:0] HSITRIM[6:0] HSI48 NA RC with clock recovery used for USB/RNG/SDMMC This table highlights the differences related to the Reset and Clock Control (RCC) mainly for PLL dividers and factors between STM32L4+ and STM32L476xx/486xx microcontrollers. 9 |
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