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STM32F407IG Datasheet(PDF) 149 Page - STMicroelectronics |
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STM32F407IG Datasheet(HTML) 149 Page - STMicroelectronics |
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149 / 201 page  DocID022152 Rev 6 149/201 STM32F405xx, STM32F407xx Electrical characteristics Figure 60. Synchronous non-multiplexed NOR/PSRAM read timings td(CLKL-AV) FSMC_CLK low to FSMC_Ax valid (x=16…25) - 0 ns td(CLKL-AIV) FSMC_CLK low to FSMC_Ax invalid (x=16…25) 8 - ns td(CLKL-NWEL) FSMC_CLK low to FSMC_NWE low - 0.5 ns td(CLKL-NWEH) FSMC_CLK low to FSMC_NWE high 0 - ns td(CLKL-ADIV) FSMC_CLK low to FSMC_AD[15:0] invalid 0 - ns td(CLKL-DATA) FSMC_A/D[15:0] valid data after FSMC_CLK low -3 ns td(CLKL-NBLH) FSMC_CLK low to FSMC_NBL high 0 - ns tsu(NWAIT- CLKH) FSMC_NWAIT valid before FSMC_CLK high 4 - ns th(CLKH-NWAIT) FSMC_NWAIT valid after FSMC_CLK high 0 - ns 1. CL = 30 pF. 2. Guaranteed by characterization. Table 80. Synchronous multiplexed PSRAM write timings(1)(2) (continued) Symbol Parameter Min Max Unit |
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