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PIC16F87-I/ML Datasheet(PDF) 207 Page - Microchip Technology |
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PIC16F87-I/ML Datasheet(HTML) 207 Page - Microchip Technology |
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207 / 214 page  2003 Microchip Technology Inc. Preliminary DS30487B-page 205 PIC16F87/88 RB0/INT/CCP1 Pin ............................................................... 9 RB1/SDI/SDA Pin ................................................................. 9 RB2/SDO/RX/DT Pin ........................................................... 9 RB3/PGM/CCP1 Pin ............................................................ 9 RB4/SCK/SCL Pin ................................................................ 9 RB5/SS/TX/CK Pin ............................................................... 9 RB6/AN5/PGC/T1OSO/T1CKI Pin ....................................... 9 RB7/AN6/PGD/T1OSI Pin .................................................... 9 RBIF Bit .............................................................................. 57 RCIO Oscillator .................................................................. 37 RCREG Register ................................................................ 14 RCSTA Register ................................................................. 14 ADDEN Bit ................................................................. 98 CREN Bit .................................................................... 98 FERR Bit .................................................................... 98 RX9 Bit ....................................................................... 98 RX9D Bit .................................................................... 98 SPEN Bit .............................................................. 97, 98 SREN Bit .................................................................... 98 Receive Overflow Indicator Bit, SSPOV ............................. 89 Register File ....................................................................... 12 Register File Map PIC16F87 ................................................................... 12 PIC16F88 ................................................................... 13 Registers ADCON0 (A/D Control 0) ......................................... 114 ADCON1 (A/D Control 1) ......................................... 115 ANSEL (Analog Select) ............................................ 113 CCP1CON (Capture/Compare/PWM Control 1) ........................................................... 81 CMCON (Comparator Control) ................................ 121 CONFIG1 (Configuration Word 1) ............................ 130 CONFIG2 (Configuration Word 2) ............................ 131 CVRCON (Comparator Voltage Reference Control) ........................................... 127 EECON1 (Data EEPROM Access Control 1) ........................................................... 28 FSR ............................................................................ 26 Initialization Conditions (table) ......................... 135–136 INTCON (Interrupt Control) ........................................ 19 OPTION ..................................................................... 18 OPTION_REG ........................................................... 68 OSCCON (Oscillator Control) .................................... 40 OSCTUNE (Oscillator Tuning) ................................... 38 PCON (Power Control) .............................................. 24 PIE1 (Peripheral Interrupt Enable 1) .......................... 20 PIE2 (Peripheral Interrupt Enable 2) .......................... 22 PIR1 (Peripheral Interrupt Status 1) ........................... 21 PIR2 (Peripheral Interrupt Status 2) ........................... 23 RCSTA (Receive Status and Control) ........................ 98 Special Function, Summary ....................................... 14 SSPCON (Synchronous Serial Port Control) ............................................ 89 SSPSTAT (Synchronous Serial Port Status) .............................................. 88 STATUS ..................................................................... 17 T1CON (Timer1 Control) ............................................ 72 T2CON (Timer2 Control) ............................................ 80 TXSTA (Transmit Status and Control) ....................... 97 WDTCON (Watchdog Timer Control) ....................... 142 RESET ......................................................................129, 132 Brown-out Reset (BOR). See Brown-out Reset (BOR). MCLR RESET. See MCLR. Power-on Reset (POR). See Power-on Reset (POR). RESET Conditions for All Registers ........................ 135 RESET Conditions for PCON Register .................... 135 RESET Conditions for Program Counter ................. 135 RESET Conditions for STATUS Register ................ 135 WDT Reset. See Watchdog Timer (WDT). Revision History ............................................................... 199 RP0 Bit ............................................................................... 11 RP1 Bit ............................................................................... 11 S SCI. See USART. SCL .................................................................................... 92 Serial Communication Interface. See USART. Slave Mode SCL ............................................................................ 92 SDA ........................................................................... 92 SLEEP .............................................................. 129, 132, 145 Software Simulator (MPLAB SIM) ................................... 158 Software Simulator (MPLAB SIM30) ............................... 158 SPBRG Register ................................................................ 15 Special Event Trigger ...................................................... 120 Special Features of the CPU ........................................... 129 Special Function Registers ................................................ 14 Special Function Registers (SFRs) .................................... 14 SPI Associated Registers ................................................. 90 Serial Clock ................................................................ 87 Serial Data In ............................................................. 87 Serial Data Out .......................................................... 87 Slave Select ............................................................... 87 SSP ACK ........................................................................... 92 I2C I2C Operation ..................................................... 92 SSPADD Register .............................................................. 15 SSPBUF Register .............................................................. 14 SSPCON Register ............................................................. 14 SSPOV .............................................................................. 89 SSPOV Bit ......................................................................... 92 SSPSTAT Register ............................................................ 15 Stack .................................................................................. 25 Overflows ................................................................... 25 Underflow .................................................................. 25 STATUS Register C Bit ........................................................................... 17 DC Bit ........................................................................ 17 IRP Bit ....................................................................... 17 PD Bit .................................................................17, 132 RP Bit ........................................................................ 17 TO Bit .................................................................17, 132 Z Bit ........................................................................... 17 Synchronous Master Reception Associated Registers ............................................... 110 Synchronous Master Transmission Associated Registers ............................................... 109 Synchronous Serial Port (SSP) ......................................... 87 Overview .................................................................... 87 SPI Mode ................................................................... 87 Synchronous Slave Reception Associated Registers ............................................... 112 Synchronous Slave Transmission Associated Registers ............................................... 111 |
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