PIC16F87-ISLASHML datasheet(136/214 Pages) MICROCHIP

136 / 214 page

PIC16F87/88

DS30487B-page 134

Preliminary

 2003 Microchip Technology Inc.

15.8

Time-out Sequence

On power-up, the time-out sequence is as follows: the

PWRT delay starts (if enabled) when a POR occurs.

Then, OST starts counting 1024 oscillator cycles when

PWRT ends (LP, XT, HS). When the OST ends, the

device comes out of RESET.

If MCLR is kept low long enough, all delays will expire.

Bringing MCLR high will begin execution immediately.

This is useful for testing purposes, or to synchronize

more than one PIC16F87/88 device operating in

parallel.

Table 15-3 shows the RESET conditions for the

STATUS, PCON and PC registers, while Table 15-4

shows the RESET conditions for all the registers.

15.9

Power Control/Status Register

(PCON)

The Power Control/Status Register, PCON, has two

bits to indicate the type of RESET that last occurred.

Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is

unknown on a Power-on Reset. It must then be set by

the user and checked on subsequent RESETS to see

if bit BOR cleared, indicating a Brown-out Reset

occurred. When the Brown-out Reset is disabled, the

state of the BOR bit is unpredictable.

Bit1 is POR (Power-on Reset Status bit). It is cleared on

a Power-on Reset and unaffected otherwise. The user

must set this bit following a Power-on Reset.

TABLE 15-1:

TIME-OUT IN VARIOUS SITUATIONS

TABLE 15-2:

STATUS BITS AND THEIR SIGNIFICANCE

Oscillator

Configuration

Power-up

Brown-out Reset

Wake-up from

SLEEP

PWRTE = 0

PWRTE = 1

PWRTE = 0

PWRTE = 1

XT, HS, LP

TPWRT + 1024 • TOSC

1024 • TOSC

TPWRT + 1024 • TOSC

1024 • TOSC

EXTRC, INTRC

TPWRT

5-10

µs(1)

TPWRT

5-10

µs(1)

5-10

µs(1)

T1OSC

—

———

5-10

µs(1)

Note 1:

CPU start-up is always invoked on POR, BOR and wake-up from SLEEP. The 5

µs-10 µs delay is based on

a 1 MHz system clock.

POR

BOR

0x1

Power-on Reset

0x0

Illegal, TO is set on POR

0xx

Illegal, PD is set on POR

101

Brown-out Reset

110

WDT Reset

110

WDT Wake-up

11u

MCLR Reset during normal operation

111

MCLR Reset during SLEEP or interrupt wake-up from SLEEP

Legend: u = unchanged, x = unknown

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