| Electronic Components Datasheet Search |
|
PIC16F87-I/ML Datasheet(PDF) 142 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC16F87-I/ML Datasheet(HTML) 142 Page - Microchip Technology |
|
142 / 214 page ![]() PIC16F87/88 DS30487B-page 140 Preliminary 2003 Microchip Technology Inc. 15.10.1 INT INTERRUPT External interrupt on the RB0/INT pin is edge-triggered, either rising, if bit INTEDG (OPTION<6>) is set, or fall- ing, if the INTEDG bit is clear. When a valid edge appears on the RB0/INT pin, flag bit, INTF (INTCON<1>), is set. This interrupt can be disabled by clearing enable bit INTE (INTCON<4>). Flag bit INTF must be cleared in software in the Interrupt Service Routine before re-enabling this interrupt. The INT inter- rupt can wake-up the processor from SLEEP, if bit INTE was set prior to going into SLEEP. The status of global interrupt enable bit GIE decides whether or not the processor branches to the interrupt vector, following wake-up. See Section 15.13 “Power-down Mode (SLEEP)” for details on SLEEP mode. 15.10.2 TMR0 INTERRUPT An overflow (FFh → 00h) in the TMR0 register will set flag bit TMR0IF (INTCON<2>). The interrupt can be enabled/disabled by setting/clearing enable bit TMR0IE (INTCON<5>), see Section 6.0 “Timer0 Module”. 15.10.3 PORTB INTCON CHANGE An input change on PORTB<7:4> sets flag bit RBIF (INTCON<0>). The interrupt can be enabled/disabled by setting/clearing enable bit RBIE (INTCON<4>), see Section 3.2 “EECON1 and EECON2 Registers”. 15.11 Context Saving During Interrupts During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to save key reg- isters during an interrupt (i.e., W, STATUS registers). Since the upper 16 bytes of each bank are common in the PIC16F87/88 devices, temporary holding registers W_TEMP, STATUS_TEMP, and PCLATH_TEMP should be placed in here. These 16 locations don’t require banking and therefore, make it easier for con- text save and restore. The same code shown in Example 15-1 can be used. EXAMPLE 15-1: SAVING STATUS, W, AND PCLATH REGISTERS IN RAM MOVWF W_TEMP ;Copy W to TEMP register SWAPF STATUS,W ;Swap status to be saved into W CLRF STATUS ;bank 0, regardless of current bank, Clears IRP,RP1,RP0 MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register MOVF PCLATH, W ;Only required if using page 1 MOVWF PCLATH_TEMP ;Save PCLATH into W CLRF PCLATH ;Page zero, regardless of current page : :(ISR) ;(Insert user code here) : MOVF PCLATH_TEMP, W ;Restore PCLATH MOVWF PCLATH ;Move W into PCLATH SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W ;(sets bank to original state) MOVWF STATUS ;Move W into STATUS register SWAPF W_TEMP,F ;Swap W_TEMP SWAPF W_TEMP,W ;Swap W_TEMP into W |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |