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PIC16F87-I/ML Datasheet(PDF) 150 Page - Microchip Technology |
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PIC16F87-I/ML Datasheet(HTML) 150 Page - Microchip Technology |
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150 / 214 page ![]() PIC16F87/88 DS30487B-page 148 Preliminary 2003 Microchip Technology Inc. 15.18 Low-Voltage ICSP Programming The LVP bit of the configuration word enables low- voltage ICSP programming. This mode allows the microcontroller to be programmed via ICSP using a VDD source in the operating voltage range. This only means that VPP does not have to be brought to VIHH, but can instead be left at the normal operating voltage. In this mode, the RB3/PGM pin is dedicated to the pro- gramming function and ceases to be a general purpose I/O pin. If Low-Voltage Programming mode is not used, the LVP bit can be programmed to a ‘0’ and RB3/PGM becomes a digital I/O pin. However, the LVP bit may only be pro- grammed when programming mode is entered with VIHH on MCLR. The LVP bit can only be changed when using high voltage on MCLR. It should be noted that once the LVP bit is programmed to ‘0’, only the High-Voltage Programming mode is available and only this mode can be used to program the device. When using Low-Voltage ICSP, the part must be sup- plied at 4.5V to 5.5V if a bulk erase will be executed. This includes reprogramming of the code protect bits from an on-state to an off-state. For all other cases of Low- Voltage ICSP, the part may be programmed at the nor- mal operating voltage. This means calibration values, unique user IDs, or user code can be reprogrammed or added. The following LVP steps assume the LVP bit is set in the Configuration register. 1. Apply VDD to the VDD pin. 2. Drive MCLR low. 3. Apply VDD to the RB3/PGM pin. 4. Apply VDD to the MCLR pin. 5. Follow with the associated programming steps. Note 1: The High-Voltage Programming mode is always available, regardless of the state of the LVP bit, by applying VIHH to the MCLR pin. 2: While in Low-Voltage ICSP mode (LVP = 1), the RB3 pin can no longer be used as a general purpose I/O pin. 3: When using Low-Voltage ICSP Program- ming (LVP) and the pull-ups on PORTB are enabled, bit 3 in the TRISB register must be cleared to disable the pull-up on RB3 and ensure the proper operation of the device. 4: RB3 should not be allowed to float if LVP is enabled. An external pull-down device should be used to default the device to normal operating mode. If RB3 floats high, the PIC16F87/88 device will enter Programming mode. 5: LVP mode is enabled by default on all devices shipped from Microchip. It can be disabled by clearing the LVP bit in the CONFIG register. 6: Disabling LVP will provide maximum compatibility to other PIC16CXXX devices. |
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