STA8100GA datasheet(18/42 Pages) STMICROELECTRONICS

18 / 42 page

General description

STA8100GA

18/42

DS13006 Rev 4

Module key features:

•

Eight DMA channels. Each channel can support a unidirectional transfer.

•

The DMAC provides 32 peripheral DMA request lines.

•

Single DMA and burst DMA request signals.

•

Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-

peripheral transfers.

•

Scatter or gather DMA support through the use of linked lists.

•

Hardware DMA channel priority. DMA channel 0 has the highest priority and channel

31 has the lowest priority.

•

If requests from two channels become active at the same time, the channel with the

highest priority is serviced first.

•

AHB slave DMA programming interface to the DMA control registers.

•

Two AHB bus masters for transferring data.

•

Programmable DMA burst size.

•

Working on AHB clock.

3.16

Antenna sensing

The following figures show how the antenna sensing circuit works. SENSE1 and SENSE2

input voltage range must be between VRF_IN and GND.

Figure 3. Antenna sensing configuration when antenna is supplied with 3.3 V

Antenna sensing detection in STA8100GA uses two comparators with hysteresis. If the

antenna is supplied with a voltage of 3.3 V the antenna sensing can be connected as

showed in the picture.

The following tables show thresholds when current is rising and when is falling with R =

1.4

Ω and V_ant = 3.3 V.

STA8100GA Datasheet(PDF) 18 Page - STMicroelectronics