73S8010R Data Sheet

DS_8010R_022

4

Rev. 1.6

Figures

Figure 1: 73S8010R Block Diagram ......................................................................................................... 2

Figure 2: 73S8010R 32-Pin QFN Pinout .................................................................................................. 5

Figure 3: 73S8010R 28-Pin SO Pinout..................................................................................................... 5

Figure 4: Typical 73S8010R Application Schematic ............................................................................... 13

Figure 5: I

2C Bus Write Protocol ............................................................................................................ 15

Figure 6: I

2C Bus Read Protocol ............................................................................................................ 16

Figure 7: I

2C Bus Timing Diagram.......................................................................................................... 16

Figure 8: Activation Sequence ............................................................................................................... 19

Figure 9: Deactivation Sequence ........................................................................................................... 20

Figure 10: Interrupt operation due to Fault and Status Conditions .......................................................... 20

Figure 11: Warm Reset Operation ......................................................................................................... 21

Figure 12: I/O Timing Diagram............................................................................................................... 21

Figure 13: 32-pin QFN Package Dimensions ......................................................................................... 22

Figure 14: 28-Pin SO Package Dimensions ........................................................................................... 23

Tables

Table 1: 73S8010R Pin Definitions .......................................................................................................... 6

Table 2: Absolute Maximum Device Ratings ............................................................................................ 8

Table 3: Recommended Operating Conditions......................................................................................... 8

Table 4: DC Smart Card Interface Requirements ..................................................................................... 9

Table 5: Digital Signals Characteristics .................................................................................................. 11

Table 6: DC Characteristics ................................................................................................................... 11

Table 7: I

2C Characteristics ................................................................................................................... 12

Table 8: Voltage / Temperature Fault Detection Circuits......................................................................... 12

Table 9: Device Address Selection ........................................................................................................ 14

Table 10: Control Register Description................................................................................................... 14

Table 11: Card Clock Rate Selection ..................................................................................................... 14

Table 12: Status Register Description .................................................................................................... 15

Table 13: I2C Bus Timing Parameters ................................................................................................... 16

Table 14: Choice of VCC Pin Capacitor ................................................................................................. 18

Table 15: Card Clock Divisor Options .................................................................................................... 18

Table 16: Order Numbers and Packaging Marks .................................................................................... 24