TS555_V01 datasheet(1/19 Pages) STMICROELECTRONICS

Part #	TS555

Description	Low-power single CMOS timer

PDF	19 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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This is information on a product in full production.

June 2015

DocID4077 Rev 4

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TS555

Low-power single CMOS timer

Datasheet

- production data

Features

• Very low power consumption:

– 110 µA typ at VCC = 5 V

– 90 µa typ at VCC = 3 V

• High maximum astable frequency of 2.7 MHz

• Pin-to-pin functionally-compatible with bipolar

NE555(a)

• Wide voltage range: +2 V to +16 V

• Supply current spikes reduced during output

transitions

• High input impedance: 1012 Ω

• Output compatible with TTL, CMOS and logic

MOS

Description

The TS555 is a single CMOS timer with very low

consumption:

(Icc(TYP) TS555 = 110 µA at VCC = +5 V versus

Icc(TYP) NE555(a) = 3 mA),

and high frequency:

(ff(max.) TS555 = 2.7 MHz versus

f(max) NE555(a) = 0.1 MHz).

Timing remains accurate in both monostable and

astable mode.

The TS555 provides reduced supply current

spikes during output transitions, which enable the

use of lower decoupling capacitors compared to

those required by bipolar NE555(a).

With the high input impedance (1012

Ω), timing

capacitors can also be minimized.

a. Terminated product

SO8

(plastic micropackage)

Pin connections

(top view)

www.st.com

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