STM32H745II datasheet(111/252 Pages) STMICROELECTRONICS

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DS12923 Rev 1

111/252

STM32H745xI/G

Electrical characteristics

228

fCPU1

Arm® Cortex®-M7 clock frequency

VOS3

200

MHz

VOS2

300

VOS1

400

VOS0

480(6)

fCPU2

Arm® Cortex®-M4 clock frequency

VOS3

200

VOS2

150

VOS1

200

VOS0

240(6)

fACLK

AXI clock frequency

VOS3

100

VOS2

150

VOS1

200

VOS0

240(6)

fHCLK

AHB clock frequency

VOS3

100

VOS2

150

VOS1

200

VOS0

240(6)

fPCLK

APB clock frequency

VOS3

50(8)

VOS2

VOS1

100

VOS0

120(6)

1. When RESET is released functionality is guaranteed down to VBOR0 min

2. Only for power-up sequence when the SMPS step-down converter is configured to supply the LDO and TJMax = 105 °C.

3. This formula has to be applied on power supplies related to the IO structure described by the pin definition table.

4. For operation with voltage higher than Min (VDD, VDDA, VDD33USB) +0.3V, the internal Pull-up and Pull-Down resistors must

be disabled.

5. VOS0 is available only when the LDO regulator is ON.

6. TJmax = 105 °C.

7. At startup, the external VCORE voltage must remain higher or equal to 1.10 V before disabling the internal regulator (LDO).

8. Maximum APB clock frequency when at least one peripheral is enabled.

Table 23. General operating conditions (continued)

Symbol

Parameter

Operating

conditions

Min

Typ

Max

Unit

Table 24. Supply voltage and maximum frequency configuration

Power scale

VCORE source

Max TJ (°C)

Max frequency (MHz)

Min VDD (V)

VOS0

LDO

105

480

1.7

SMPS step-down

converter(1)

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