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STM32H7A3XI Datasheet(PDF) 13 Page - STMicroelectronics |
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STM32H7A3XI Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 237 page  The Flash memory is organized as follows: • For STM32H7AxI: two independent 1 Mbyte banks of user Flash memory, each one containing 128 user sectors of 8 Kbytes each. For STM32H7AxG: two independent 512 Kbyte banks of user Flash memory, each one containing 64 user sectors of 8 Kbytes each. • 128 Kbytes of System Flash memory from which the device can boot. • 1 Kbyte of OTP (one-time programmable) memory containing option bytes for user configuration. 3.3.2 Embedded SRAM All devices feature: • 1 Mbyte of AXI-SRAM mapped onto AXI bus matrix in CPU domain (CD) split into: – AXI-SRAM1: 256 Kbytes – AXI-SRAM2: 384 Kbytes – AXI-SRAM3: 384 Kbytes • 128 Kbytes of AHB-RAM mapped onto AHB bus matrix in CPU domain (CD) split into: – AHB-SRAM1: 64 Kbytes – AHB-SRAM2: 64 Kbytes • 32 Kbytes of SRD-SRAM mapped in Smart Run Domain (SRD) • 4 Kbytes of backup SRAM The content of this area is protected against possible unwanted write accesses, and is retained in Standby or VBAT mode. • RAM mapped to TCM interface (ITCM and DTCM): Both ITCM and DTCM RAMs are 0 wait state memories that are accessible from the CPU or the MDMA (even in Sleep mode) through a specific AHB slave of the CPU(AHBP). • 64 Kbytes of ITCM-RAM (instruction RAM) This RAM is connected to ITCM 64-bit interface designed for execution of critical real-times routines by the CPU. • 128 Kbytes of DTCM-RAM (2x 64 Kbyte DTCM-RAMs on 2x32-bit DTCM ports) The DTCM-RAM could be used for critical real-time data, such as interrupt service routines or stack/heap memory. Both DTCM-RAMs can be used in parallel (for load/store operations) thanks to the Cortex®-M7 dual issue capability. 3.4 Boot modes At startup, the boot memory space is selected by the BOOT pin and BOOT_ADDx option bytes, allowing to program any boot memory address from 0x0000 0000 to 0x3FFF FFFF which includes: • All flash address space • All RAM address space: ITCM, DTCM RAMs and SRAMs • The system memory bootloader The boot loader is located in non-user System memory. It is used to reprogram the flash memory through a serial interface (USART, I2C, SPI, USB-DFU, FDCAN). Refer to STM32 microcontroller system memory boot mode application note (AN2606) for details. 3.5 Power supply management 3.5.1 Power supply scheme • VDD = 1.62 to 3.6 V: external power supply for I/Os, provided externally through VDD pins. • VDDLDO = 1.62 to 3.6 V: supply voltage for the internal regulator supplying VCORE • VDDA = 1.62 to 3.6 V: external analog power supplies for ADC, DAC, Reset blocks, RCs and PLL. • VDD33USB and VDD50USB: VDD50USB can be supplied through the USB cable to generate the VDD33USB via the USB internal regulator. This allows supporting a VDD supply different from 3.3 V. STM32H7A3xI/G Boot modes DS13195 - Rev 8 page 13/237 |
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