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STM32H753II Datasheet(PDF) 269 Page - STMicroelectronics |
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STM32H753II Datasheet(HTML) 269 Page - STMicroelectronics |
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269 / 361 page ![]() DS12117 Rev 8 269/360 STM32H753xI Electrical characteristics (rev V) 318 Table 176. SDRAM read timings(1) 1. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(SDCLK) FMC_SDCLK period 2Tfmc_ker_ck – 1 2Tfmc_ker_ck +0.5 ns tsu(SDCLKH _Data) Data input setup time 3 - th(SDCLKH_Data) Data input hold time 0 - td(SDCLKL_Add) Address valid time - 1.5 td(SDCLKL- SDNE) Chip select valid time - 1.5 th(SDCLKL_SDNE) Chip select hold time 0.5 - td(SDCLKL_SDNRAS) SDNRAS valid time - 1 th(SDCLKL_SDNRAS) SDNRAS hold time 0.5 - td(SDCLKL_SDNCAS) SDNCAS valid time - 0.5 th(SDCLKL_SDNCAS) SDNCAS hold time 0 - Table 177. LPSDR SDRAM read timings(1) 1. Guaranteed by characterization results. Symbol Parameter Min Max Unit tW(SDCLK) FMC_SDCLK period 2Tfmc_ker_ck – 1 2Tfmc_ker_ck+0.5 ns tsu(SDCLKH_Data) Data input setup time 3 - th(SDCLKH_Data) Data input hold time 0.5 - td(SDCLKL_Add) Address valid time - 2.5 td(SDCLKL_SDNE) Chip select valid time - 2.5 th(SDCLKL_SDNE) Chip select hold time 0 - td(SDCLKL_SDNRAS SDNRAS valid time - 0.5 th(SDCLKL_SDNRAS) SDNRAS hold time 0 - td(SDCLKL_SDNCAS) SDNCAS valid time - 1.5 th(SDCLKL_SDNCAS) SDNCAS hold time 0 - |
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