STM32H753II datasheet(273/361 Pages) STMICROELECTRONICS

Part #	STM32H753II

Description	32-bit Arm® Cortex®-M7 480MHz MCUs, 2MB Flash,1MB RAM, 46 com. and analog interfaces, crypto

PDF	361 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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273 / 361 page

DS12117 Rev 8

273/360

STM32H753xI

Electrical characteristics (rev V)

318

Figure 89. QUADSPI timing diagram - SDR mode

Table 181. QUADSPI characteristics in DDR mode(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fck11/TCK

QUADSPI clock frequency

2.7<VDD<3.6 V

CL = 20 pF

100

MHz

1.62<VDD<3.6 V

CL = 15 pF

100

tw(CKH)

QUADSPI clock high and

low time Even division

PRESCALER[7:0] =

n = 0,1,3,5...

TCK/2–0.5

TCK/2

tw(CKL)

TCK/2

TCK/2+0.5

tw(CKH)

QUADSPI clock high and

low time Odd division

PRESCALER[7:0] =

n = 2,4,6,8...

(n/2)*TCK/

(n+1)-0.5

(n/2)*TCK/

(n+1)

tw(CKL)

(n/2+1)*TCK/

(n+1)

(n/2+1)*TCK /

(n+1)+0.5

tsr(IN), tsf(IN)

Data input setup time

2.7<VDD<3.6 V

2.5

1.62<VDD<3.6 V

1.5

thr(IN),thf(IN)

Data input hold time

2.7<VDD<3.6 V

1.62<VDD<3.6 V

2.5

tvr(OUT),

tvf(OUT)

Data output valid time

DHHC=0

DHHC=1

PRESCALER[7:0] =

1,2…

-TCK/4+1

TCK/4+2

thr(OUT),

thf(OUT)

Data output hold time

DHHC=0

DHHC=1

PRESCALER[7:0]=1

,2…

TCK/4

1. Guaranteed by characterization results.

MSv36878V1

Data output

Clock

Data input

t(CK)

tw(CKH)

tw(CKL)

tr(CK)

tf(CK)

ts(IN)

th(IN)

tv(OUT)

th(OUT)

STM32H753II Datasheet(PDF) 273 Page - STMicroelectronics

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