STM32H753II datasheet(316/361 Pages) STMICROELECTRONICS

316 / 361 page

Electrical characteristics (rev V)

STM32H753xI

316/360

DS12117 Rev 8

Figure 116. Ethernet MII timing diagram

JTAG/SWD interface characteristics

Unless otherwise specified, the parameters given in Table 215 and Table 216 for

JTAG/SWD are derived from tests performed under the ambient temperature, frcc_c_ck

frequency and VDD supply voltage summarized in Table 121: General operating conditions,

with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 0x10

•

Capacitive load CL=30 pF

•

Measurement points are done at CMOS levels: 0.5VDD

•

VOS level set to VOS1

Refer to Section 7.3.15: I/O port characteristics for more details on the input/output

characteristics:

Table 214. Dynamics characteristics: Ethernet MAC signals for MII (1)

1. Guaranteed by characterization results.

Symbol

Parameter

Min

Typ

Max

Unit

tsu(RXD)

Receive data setup time

tih(RXD)

Receive data hold time

tsu(DV)

Data valid setup time

1.5

tih(DV)

Data valid hold time

1.5

tsu(ER)

Error setup time

1.5

tih(ER)

Error hold time

0.5

td(TXEN)

Transmit enable valid delay time

td(TXD)

Transmit data valid delay time

8.5

9.5

12.5

ai15668b

MII_RX_CLK

MII_RXD[3:0]

MII_RX_DV

MII_RX_ER

td(TXEN)

td(TXD)

tsu(RXD)

tsu(ER)

tsu(DV)

tih(RXD)

tih(ER)

tih(DV)

MII_TX_CLK

MII_TX_EN

MII_TXD[3:0]

STM32H753II Datasheet(PDF) 316 Page - STMicroelectronics

STM32H753II Datasheet(HTML) 316 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL