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STM32L062C8F3DTR Datasheet(PDF) 19 Page - STMicroelectronics |
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STM32L062C8F3DTR Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 124 page ![]() DS10183 Rev 11 19/124 STM32L062x8 Functional overview 36 3.2 Interconnect matrix Several peripherals are directly interconnected. This allows autonomous communication between peripherals, thus saving CPU resources and power consumption. In addition, these hardware connections allow fast and predictable latency. Depending on peripherals, these interconnections can operate in Run, Sleep, Low-power run, Low-power sleep and Stop modes. Table 5. STM32L062x8 peripherals interconnect matrix Interconnect source Interconnect destination Interconnect action Run Sleep Low- power run Low- power sleep Stop COMPx TIM2,TIM21, TIM22 Timer input channel, trigger from analog signals comparison YY Y Y - LPTIM Timer input channel, trigger from analog signals comparison YY Y Y Y TIMx TIMx Timer triggered by other timer YY Y Y - RTC TIM21 Timer triggered by Auto wake-up YY Y Y - LPTIM Timer triggered by RTC event YY Y Y Y All clock source TIMx Clock source used as input channel for RC measurement and trimming YY Y Y - USB CRS/HSI48 the clock recovery system trims the HSI48 based on USB SOF YY - - - GPIO TIMx Timer input channel and trigger YY Y Y - LPTIM Timer input channel and trigger YY Y Y Y ADC,DAC Conversion trigger Y Y Y Y - |
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