MFS5600AMBA0ES datasheet(50/111 Pages) NXP

50 / 111 page

NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

17.9.2 NOT logic registers

To prevent unintended writes to critical registers, a required two-step writing process

must be followed.

1. Write the desired data in the REGISTER

2. Write the NOT value of Step 1 to the corresponding NOT_REGISTER

For example,

• SWx regulator will be enabled if ((SWx_EN = 1 AND NOT_SWx_EN = 0) AND (ENx pin

= HIGH)).

• SWx regulator will be disabled if ((SWx_EN = 0 AND NOT_SWx_EN = 1) OR (ENx pin

= LOW)).

A real-time XOR is performed to ensure that only complimentary register values are

accepted. Refer to Section 18 for list of registers where this feature is applicable.

17.10 I2C Write protection

To prevent unintended writes to critical registers during system NORMAL state, certain

registers may be modified only in the INIT_RUN state. These are:

FCCU12_BISTABLE

FCCU2_FLT_POL

FCCU1_FLT_POL

NOT_FCCU12_FLT_POL

NOT_FCCU12_BISTABLE

NOT_FCCU2_FLT_POL

NOT_FCCU1_FLT_POL

NOT_SW1_EN

SW1_EN

NOT_SW2_EN

SW2_EN

NOT_FLT_ERR_CNT_LIMIT[1:0]

FLT_ERR_CNT_LIMIT[1:0]

NOT_WD_ERR_LIMIT[1:0]

WD_ERR_LIMIT[1:0]

NOT_WD_RFR_LIMIT[1:0]

WD_RFR_LIMIT[1:0]

NOT_WD_FAIL_IMPACT[1:0]

WD_FAIL_IMPACT[1:0]

CLR_FLT_ERR_CNT

FCCU12_FLT_POL

NOT_CLR_FLT_ERR_CNT

Table 47. List of registers modifiable only during INIT_RUN state

The following registers are protected after the first WD_OK in the INIT_RUN if the

watchdog is enabled. These are:

FLT_ERR_CNT_LIMIT[1:0]

NOT_FLT_ERR_CNT_LIMIT[1:0]

WD_ERR_LIMIT[1:0]

NOT_WD_ERR_LIMIT[1:0]

WD_RFR_LIMIT[1:0]

NOT_WD_RFR_LIMIT[1:0]

WD_FAIL_IMPACT[1:0]

NOT_WD_FAIL_IMPACT[1:0]

CLR_FLT_ERR_CNT

NOT_CLR_FLT_ERR_CNT

Table 48. INIT_RUN protected registers after first WD_OK if watchdog enabled.

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 2 August 2022

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