KSZ8893MQL datasheet(21/108 Pages) MICROCHIP

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DS00002897A-page 21

KSZ8893MQL/MBL

3.0

FUNCTIONAL DESCRIPTION

The KSZ8893MQL/MBL devices contain two 10/100 physical layer transceivers and three MAC units with an integrated

Layer 2 managed switch.

The KSZ8893MQL/MBL has the flexibility to reside in either a managed or unmanaged design. In a managed design,

the host processor has complete control of the KSZ8893MQL/MBL via the SMI interface, MIIM interface, SPI bus or I2C

bus. An unmanaged design is achieved through I/O strapping and/or EEPROM programming at system Reset time.

On the media side, the KSZ8893MQL/MBL supports IEEE 802.3 10BASE-T and 100BASE-TX on both PHY ports, and

also 100BASE-FX on PHY Port 1, which allows the KSZ8893MQL/MBL to be used as a media converter.

Physical signal transmission and reception are enhanced through the use of patented analog circuitries that make the

design more efficient, and allow for lower power consumption and smaller chip die size.

3.1

Physical Layer Transceiver

3.1.1

100BASE-TX TRANSMIT

The 100BASE-TX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ-to-NRZI

conversion, and MLT3 encoding and transmission.

The circuitry starts with a parallel-to-serial conversion, which converts the MII data from the MAC into a 125 MHz serial

bit stream. The data and control stream is then converted into 4B/5B coding, followed by a scrambler. The serialized

data is further converted from NRZ-to-NRZI format, and then transmitted in MLT3 current output. The output current is

set by an external 1%, 3.01 k

 resistor for the 1:1 transformer ratio.

The output signal has a typical rise/fall time of 4 ns and complies with the ANSI TP-PMD Standard regarding amplitude

balance, overshoot and timing jitter. The wave shaped 10BASE-T output is also incorporated into the 100BASE-TX

transmitter.

3.1.2

100BASE-TX RECEIVE

The 100BASE-TX receiver function performs adaptive equalization, DC restoration, MLT3-to-NRZI conversion, data and

clock recovery, NRZI-to-NRZ conversion, descrambling, 4B/5B decoding and serial-to-parallel conversion.

The receiving side starts with the equalization filter to compensate for Inter-Symbol Interference (ISI) over the twisted pair

cable. Because the amplitude loss and phase distortion is a function of the cable length, the equalizer must adjust its char-

acteristics to optimize performance. In this design, the variable equalizer makes an initial estimation based on comparisons

of incoming signal strength against some known cable characteristics, and then tunes itself for optimization. This is an

ongoing process and self-adjusts against environmental changes, such as temperature variations.

Next, the equalized signal goes through a DC restoration and data conversion block. The DC restoration circuit is used

to compensate for the effect of baseline wander and to improve the dynamic range. The differential data conversion

circuit converts the MLT3 format back to NRZI. The slicing threshold is also adaptive.

The clock recovery circuit extracts the 125 MHz clock from the edges of the NRZI signal. This recovered clock is then

used to convert the NRZI signal into the NRZ format. This signal is sent through the descrambler, followed by the

4B/5B decoder. Finally, the NRZ serial data is converted to the MII format and provided as the input data to the MAC.

3.1.3

PLL CLOCK SYNTHESIZER

The KSZ8893MQL/MBL generates 125 MHz, 31.25 MHz, 25 MHz, and 10 MHz clocks for system timing. Internal clocks

are generated from an external 25 MHz crystal or oscillator. In RMII mode, these internal clocks are generated from an

external 50 MHz oscillator or system clock.

3.1.4

SCRAMBLER/DESCRAMBLER (100BASE-TX ONLY)

The purpose of the scrambler is to spread the power spectrum of the signal to reduce Electromagnetic Interference

(EMI) and baseline wander. Transmitted data is scrambled through the use of an 11-bit wide Linear Feedback Shift reg-

ister (LFSR). The scrambler generates a 2047-bit non-repetitive sequence and the receiver then descrambles the

incoming data stream using the same sequence as at the transmitter.

3.1.5

100BASE-FX OPERATION

100BASE-FX operation is similar to 100BASE-TX operation with the differences being that the scrambler/descrambler

and MLT3 encoder/decoder are bypassed on transmission and reception. In addition, auto-negotiation is bypassed and

Auto MDI/MDI-X is disabled.

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