VLMG21..

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Vishay Semiconductors

Rev. 1.8, 01-Feb-2022

4

Document Number: 81750

For technical questions, contact: LED@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SOLDERING PROFILE

Fig. 8 - Vishay Lead (Pb)-free Reflow Soldering Profile

(according to J-STD-020)

PACKAGE DIMENSIONS in millimeters

0

50

100

150

200

250

300

0

50

100

150

200

250

300

Time (s)

240 °C

245 °C

max. 260 °C

max. 120 s

max. 100 s

217 °C

max. 30 s

max. ramp up 3 °C/s

max. ramp down 6 °C/s

19885-1

IR Reflow Soldering Profile for Lead (Pb)-free Soldering

Preconditioning acc. to JEDEC level 3

max. 2 cycles allowed

255 °C

Drawing-No.: 6.541-5069.01-4

Issue: 2; 24.11.14

2.2 ± 0.1

2.05 ± 0.1

0.4 ± 0.1

0.9 ± 0.1

1.4 ± 0.1

Cathode mark

Not indicated tolerances ± 0.2

(1.5)

Area not flat

technical drawings

according to DIN

specifications

Solder resist

Cu.area > 5 mm2

1

Proposed pad layout

(for reference only)