AX88772

USB to 10/100 Fast Ethernet/HomePNA Controller

8.1.3

LEAKAGE CURRENT AND CAPACITANCE ............................................................................ 33

8.1.4

DC CHARACTERISTICS OF 2.5V I/O PINS ........................................................................... 34

8.1.5

DC CHARACTERISTICS OF 3.3V I/O PINS ........................................................................... 34

8.2

POWER CONSUMPTION........................................................................................................... 34

8.3

POWER-UP SEQUENCE............................................................................................................ 35

8.4

AC TIMING CHARACTERISTICS.............................................................................................. 35

8.4.1

CLOCK TIMING ................................................................................................................... 35

8.4.2

RESET TIMING .................................................................................................................... 36

8.4.3

MII TIMING (100MBPS) ..................................................................................................... 36

8.4.4

STATION MANAGEMENT TIMING ........................................................................................ 37

8.4.5

SERIAL EEPROM TIMING.................................................................................................. 38

9.0

PACKAGE INFORMATION............................................................................................ 39

10.0

ORDERING INFORMATION ...................................................................................... 40

APPENDIX A: SYSTEM APPLICATIONS ................................................................................. 41

A.1 USB TO FAST ETHERNET CONVERTER ..................................................................................... 41

A.2 USB TO FAST ETHERNET AND/OR HOMELAN COMBO SOLUTION ............................................ 41

REVISION HISTORY .................................................................................................................... 42

List of Figures

FIGURE 1: AX88772 BLOCK DIAGRAM ................................................................................................ 4

FIGURE 2: AX88772 PINOUT DIAGRAM................................................................................................ 5

FIGURE 3: INTERNAL DATAPATH DIAGRAM OF 10/100 ETHERNET PHY AND MII INTERFACE........... 10

FIGURE 4: INTERNAL CONTROL MUX FOR STATION MANAGEMENT INTERFACE ................................. 11

FIGURE 5: MULTICAST FILTER EXAMPLE............................................................................................ 23

List of Tables

TABLE 1: PINOUT DESCRIPTION ............................................................................................................ 6

TABLE 2: SERIAL EEPROM MEMORY MAP ....................................................................................... 12

TABLE 3: USB STANDARD COMMAND REGISTER MAP....................................................................... 17

TABLE 4: USB VENDOR COMMAND REGISTER MAP .......................................................................... 18

TABLE 5: REMOTE WAKEUP TRUTH TABLE ........................................................................................ 27

TABLE 6: EMBEDDED ETHERNET PHY REGISTER MAP........................................................................ 28

ASIX ELECTRONICS CORPORATION

3